I was on a team that flew an experiment on the space shuttle. The microcontroller we used a 6116. The first flight was great, on the second flight we had data get scrambled. We figured it was radiation flipping bits. We went from the standard 6116 for $4 to the radiation hard version for $1100. A lot of money, but we never had the problem again on the next 12 flights.
I remember reading an article about removing the top off these 6116 ic's (easier with ceramic packages) and adding a lense to form an image sensor. just read back the array into an Arduino and display it on the PC. IR sensitive too.
Thanks for this, Julian. I've also watched the Ben Eater videos and other home brew computer builds. Over the past year and a half, I've been steadily building-up a supply of CMOS and HCT parts to start my own design. Like you, I wanted a display all the bus and address bits using LEDs in the various sections of my machine. I also wanted to not only have the LEDs showing the data and address bits flying around, but have video output too, rather than only using a terminal and serial I/O. To that end, I've built a Parallax Propeller P8X32A based proto-board that's small and is very easy to produce multiple modes of VGA output, PS/2 keyboard and mouse interface; while using the remaining I/O ports and CPUs to make an interface to my home brew design. At the moment I'm designing the ALU and have decided to use two 74LS181 (2 x 4bit) to provide 8 logical and 8 mathematical instructions. The glue logic will be fun.... I thoroughly enjoy your videos and find my level of Geekyness is always topped-up watching your projects and tinkering unfold!
I like the idea of this minimalist architecture (positively bauhaus). If one looks through the assembly language of most software it is mainly moves and compares (something that you have not mentioned thus far). Even a branch is just a move of another address into the program counter. Look forward to watching this pan out
I love your one instruction computer idea, it's a very clever and fascinating concept. But in what you've shown, you are only using 5 of the possible 16 addresses, and I'm sure you have uses for the others in mind. I have some suggestions:- * 2 or 3 more of the 1 byte memories (call them registers or accumulators) * A counter that increments (or decrements) when selected for write, and presents its count for read. * Another 1 byte memory acting as an "Instruction Register" (IR) for:- * Two 74181 4-bit Arithmetic-Logic-Units (ALU)s that take inputs from 2 of the registers (or counters), with the operation governed by 4 bits from the IR. (the ALU can do bit shifting also) * The other bits of the IR could be used to select which registers/counters become the operands to the ALU. * One of the IR bits could implement conditional branching:- It would enable setting a "Skip" flip-flop when, for example:- * The ALU sets its A=B comparator output. * Some other bit in the system (say the MSB of a register) is a one Then divide the system clock by 2 (or is it 4?) to make a 2-phase clock. The Program counter is always incremented to the next program address on one phase, and incremented again on the other phase if the Skip FF is set (and then clear it) * I just saw someone else talked about putting the PC into the address space, which is very neat. It can implement a jump that may be skipped over. (like an AVR) * A 4-bit register that writes the read address into its low nibble, to load an immediate value. (or use two addresses for 8 bits) * Implement these 16 addressed functional blocks as pluggable modules to allow customization and experimentation with new ideas. * Use a PC via USB connected Arduino to download "programs" into the 6116. * Write a PC based IDE/assembler/compiler for it. I'll stop now, but the possibilities are almost boundless... (could involve a lot of wiring though)
Why does the static RAM reset with power-off? I always thought static ram retained it's contents w... Forget it, static just refers to being "not dynamic" ie not requiring dynamic refresh... (mutters something indecipherably) YOU KIDS, GET OFF MY LAWN!!
DRAM uses capacitors which will slowly discharge and lose the information stored if it isn't read and re-written periodically. SRAM uses electronic gates which don't lose their state if they aren't rewritten, but will lose their state if they are unpowered. NAND Flash memory uses floating electronic gates which are electrically isolated from the rest of the chip (they use a very high voltage generated on-device to push through the isolation during writes)
You keep these things going, and my head always goes to the on-board computer for the Jupiter One on Lost In Space, one of my all time favorite sci-fi shows out of my past! I have always wanted to build a display sort of a miniaturized LIS compute display. While I never saw any intelligence in those flashing lights I just thought they would look cool. I would really like to build something like that and stick it in some vacant space on the huge dash board of our Class A Motor Home, just to make guests scratch their heads as to what sort of system I had hooked up in it when they visit.
Certainly looking forward to seeing how your computer will work in practice. It seems like Ben Eater's inspiring plenty of people to go out and design/make their own unique computers, myself included. I've mostly completed the design of a simple(ish) but still very powerful 8-bit TTL computer. I do find more unconventional computers, which squeeze the most power out of the fewest gates to be the most interesting, though. Good luck!
I ended up using a 6116 as a pixel memory in a display circuit - was quite amused that when it powered up it displayed random garbage pixels! Nothing neat like 0xFF or 00, all bits were unrelated! :)
Hi Julian - I'm repairing an old video game board and it has an NMOS 2048 x 8 Ram on board which I believe may be faulty (D4016). Would it possible to replace this with a CMOS device 2048 x 8 RAM like the 6116 that you are using here, please? Would it work? They appear to have the same pin-out. Thank you
Looking super forward to some of those breadboard computer videos! When I was younger I had a lot of experience making computers in a game called minecraft using very similar logic that is used by real computers. The only thing I never understood is why a clock is needed. What is the point of a clock when you could just have a line that links the path between different components?
I love this Julian. Elegant in its simplicity. I look forward to following along. It looks like a candidate to eventually be housed in a case with LEDs and switches mounted on the front like an Altair 8800 type of thing. That I'd like to build. JU-6116?
Love these Chip on Breadboard videos! :) I dug out an old 16KB expansion cart from my VIC20 and found that it has 8 6116s and a 74139. Want to play with them and an FPGA mini dev board, but it's 3.3v. Can you recommend a chip for level translation? I think I need 8 bidirectional (data), and 14 unidirectional. Never had to do level shifting before.
Julian, how do you get the RAM to accept the IO lines as High when you pull Write Enable to ground? I've replicated your setup and when I pull WE to ground, I am writing all zeros. I have to force the IO high to actually accept it. Is that a peculiarity of your Toshiba 2016 vs, say, an ST M6116LN?
An interesting idea, but rather than having 4 "read" lines and 4 "write" lines, I'd suggest having 4 "read/write" lines with one logic state being "read" and the other being 'write" plus 4 "enable" lines. The idea of this configuration is to prevent the possibility of accidentally reading and writing from and to the same "register" which is a possibility with your suggested configuration. Allowing each register to only read or write but never both at the same time will prevent any possibility of "shorting" outputs to inputs of the same register.
That would make each instruction a copy to Transfer Register copy from Transfer register pair with an assume Transfer Register with no address. It would start to look like a microcoded CPU.
Actually, since there's no intermediate register, it would be an Output to bus / Input from bus pair. Presuming that "write" is high or 1 and "read" is low or 0 and "enable" is also active low or 0, one of the Read/Write lines would be taken high and a different one would be taken low, then the corresponding Enable lines for those registers would both be pulsed low to perform the copy. Of course there would need to be some careful timing to ensure the Enable for the Output does not go high before the Enable for the Input goes high, otherwise invalid data would be latched into the destination.
Neat idea. I'm also considering a 7-bit address and a direction bit. This would provide 128 addresses which can be moved to and from an unaddressed accumulator.
Hi Julian, watching your videos I realize I still have tons of things to learn. About your new project, do you know the Ben Eater channel? It's very interesting as well. Best regards!
The curly toshiba logo is my favourite semiconductor company logo - iirc they kept it going on the chips for quite a while after starting to use the boring modern logo on tellys etc. but of course they went boring on the chips too eventually.
Hey Julian, loving the new "Chip on Breadboard" videos, please keep them coming. incidentally, are the UART and Static RAM from the big box of ICs I sent you last year?
I've made (a while ago) a Virtual machine with Arduino, it NEEDS a LCD shield and I can program it in Assembler. The virtual machine has 256 bytes of program memory (it's enough), 16 nibbles of RAM, can access the buttons as imput and 6 LCD characters as an output. The only way to program it is via the LCD Shield. I'm gonna upload it and put a link tomorrow.
Hi, and thank you for sharing all interesting videos! I have looked around at ebay after that white 2-pole connector you are using, but i can't find it. Do you know where i can bye those connectors? /Stefan
For me it looks more like TTA architecture. While technically TTA is an OISC, it is not completely true. You rely on data move/copy to implement different instructions and by changing what every memory location does with the data, you choose what specific word of program data is going to do. Thus you make different instructions. Typical OISC treats all memory locations equaly (with the exception of MMIO devices). I've built both in FPGA and there are some major differences between them, in hardware and programming techniques as well. And BTW… I think you want to make Program Counter available for writing in the address space so you can implement branches (little tip: you can share addresses of read only and write only registers to save some of the, very limited, address space).
Yes, I'll move the program counter into the data address space at a later time to implement GOTOs. Initially I'll just connect one of the program counter's flip-flops back to its own RESET input to create different sized loops and have a PRESET facility on the program counter to facilitate the setup code. Address space can be expanded by by having a seven bit address and a direction bit so you can write from and to an accumulator.
Using a chip LH5764/J, first time hooking to breadboard , without the LEDs, to get the hex address in it, using Arduino nano, do the USB from nano power the chip to cycle through the read address in hex file output? Or does the breadboard need it's own 5volt required by the LH5764/J, @julianilett, @q12x
its a good project but i don't swallow the concept to use 2 chips to utilize a 3rd one..maybe a good learning excersize..can u make a similar project for thise ddr2 /3 laptop Sodimm ram modules?
i saw ben eaters breadboard computer and i was having trouble finding a set of 74ls189 64Bit ram 16 Words x 4, is this chip a good replacement for the ram module he's using?
You can use it (and maybe any SRAM). This one (the 6116) is a good replacement. Just tie down (or high) the not used adresses pins, and use the other pins as it were the ls189. There is no need to correlate the bit number with their marking (i.e. you can use DB4 for other bit), as long as they're used as intended (i.e. data bus for data, and address port for addressing it).
Definitely, much cheaper too, i usually grab more than i need so i was going to get 3 74ls189's(only needed 2) but it came to about about £20-25(including postage), however 2 of the 6116 Sram Chips came to about £5-8(including Postage)
Really? De-fi-ant-ly? Also, I don't know where you guys have been looking, but aliexpress has lots of 74ls189 from $0.50 a piece, and lots of 6116 from $0.63 a piece, plus a bit of shipping here and there.
Anvilshock Woops, I did not notice I spelt that wrong, but you know what I meant, anyway it's too late now I just bought 2 of these chips for £4 off ebay.
Julian, I get what you say about the OIC thing, but I think it would be better if you add some kind of branching capability, like jump if carry, jump if zero, and so on. Without that, you can't do anything "more" complex than standar additions or subtractions. I know you might write a long code that can do slighter complex things, like multiply (adding things repeatedly), but you know...
Yes, for instance, when you execute a jump if zero, you only need to check if the last operation set the zero flag. In that case, move the lower data (from the instruction, which holds the jump destination) into that PC mapped in RAM space. I don't think it would be necessary to map the flags register, just use it as an internal thing. I'm looking forward to this project!
Santiago Hormazabal when I was looking into oisc, "subleq" seemed easiest in term of programming, though I haven't thought about how to do the hardware.
Miss two instructions. Conditional jump (load address to program counter) and a adder. Then I think it would be able to be equivalent to a Turing Machine. :-)
If you put the LEDs and DIP switches at the same address, that gives you 15 registers instead of 14. I'd add an inverter register and a Zero ie 0x00 register, which would give you the ability to set a register to 0x00 or 0xFF in just one or two M states. If you want to be fancy a Mask and Result pair, either XOR or AND (or one of each)
Yep, all of that stuff. I'm also thinking of an 8-bit latch where the address lines are connected to the data inputs - it would emulate a ROM full of literal values.
Havent seen one of these since I fudged a few into my ZX81 to make it 8k static ram (Using either a 74138 or 74139 as address decoder I cant remember which). That was in 1983!
138 iirc is the 3 to 8 line demux with active low output (as used for chip select), so you must have been planning for an upgrade to 16k when the price of SRAM came down :) The irony was that a Z80 can refresh DRAM by itself, but not many people understood that magic.
@MattOGormanSmith It was nothing to do with refresh. 4116's you need 8 as a minimum and you cant battery back them. I could have used a single 6116, and 8 off 4116 was more expensive than 4 off 6116.
Julian Ilett would you be interested in getting your hands on an FPGA board to evaluate? I should have some batch 1 production units in less than 2 months. There is no programming cable required if you have a Raspberry Pi and they can either work with one or stand alone. I also have some digital indicator boards (16 bit) for demo and basic debugging if you want to try those out too.
It is random data. If you look at the circuit for sram you will see that it is two NOT gates back to back. When initially turned on they will 'fight' each other until they reach a stable state of 1 or 0.
I do have a nagging but feint recollection of some minimalist programming language way back in the very early eighties. One of those things that breathless TV presenters seriously suggest would turn british school children into Bill Gates or Paul Allen. Anyway, that was similarly reduced instruction and just required a different approach to the algorithm. I just know if I can remember the details it would be of use. Of course it is just as likely to be early onset dementia (OK, maybe not that early).
Impressive how you simplify things. Reading and writing to RAM, and flashing LEDs with Z80 in previous video! It looks like data bus is connected to LEDs and to resistors to ground. I wonder why ones are written to the RAM instead of zeros when you pull write low? Thanks
If I had to make a guess, it would be that the forward bias voltage of each LED when combined with each resistor is too high to pull the data lines to ground against the internal pull-up which is automatically applied when the data lines become inputs.
Is asserting read enable and write enable maybe a shortcut to writing FF? Maybe for testing or blanking? When are you going to finish the vocoder? /me ducks
Julian Ilett If as you suggest that pulling the WR line low disables the output pins, then you've committed the cardinal sin of CMOS, you have floating input gates. It can't be the LED's / resistor chain tying the inputs to ground, that would result in all lows being written wouldn't it ?
NO. YOU HAVE TO USE A BACKUP BATTERY OR USE TIMEKEEPER RAM. TIMEKEEPER RAM IS A RAM CHIP THAT CONTAINS RAM BUT ALSO A BACKUP BATTERY AND A CRYSTAL OSCILLATOR BOTH FITTED IN THE CHIP PACKAGE.
Nice, love the breadboard computers, in the future I would like to see a Z80 based computer on your channel
A Z80 based breadboard computer! Now that's something I've always wanted to do too
video from Jullian feels good and makes my bad day good for some minuits.
Very kind - thanks Akarsh :)
Yeah i love the videos when he tinkers.
I miss this type of your videos in past years, always love them.
I was on a team that flew an experiment on the space shuttle. The microcontroller we used a 6116. The first flight was great, on the second flight we had data get scrambled. We figured it was radiation flipping bits. We went from the standard 6116 for $4 to the radiation hard version for $1100. A lot of money, but we never had the problem again on the next 12 flights.
I remember reading an article about removing the top off these 6116 ic's (easier with ceramic packages) and adding a lense to form an image sensor. just read back the array into an Arduino and display it on the PC. IR sensitive too.
Thank you for this. I was making a proteus simulation and your programming of the chip explanation helped immensely !
Thanks for this, Julian. I've also watched the Ben Eater videos and other home brew computer builds.
Over the past year and a half, I've been steadily building-up a supply of CMOS and HCT parts to start my own design. Like you, I wanted a display all the bus and address bits using LEDs in the various sections of my machine. I also wanted to not only have the LEDs showing the data and address bits flying around, but have video output too, rather than only using a terminal and serial I/O.
To that end, I've built a Parallax Propeller P8X32A based proto-board that's small and is very easy to produce multiple modes of VGA output, PS/2 keyboard and mouse interface; while using the remaining I/O ports and CPUs to make an interface to my home brew design.
At the moment I'm designing the ALU and have decided to use two 74LS181 (2 x 4bit) to provide 8 logical and 8 mathematical instructions. The glue logic will be fun....
I thoroughly enjoy your videos and find my level of Geekyness is always topped-up watching your projects and tinkering unfold!
I like the idea of this minimalist architecture (positively bauhaus). If one looks through the assembly language of most software it is mainly moves and compares (something that you have not mentioned thus far). Even a branch is just a move of another address into the program counter. Look forward to watching this pan out
I love these Chip on Breadboard videos. Thanks for doing them.
I love your one instruction computer idea, it's a very clever and fascinating concept. But in what you've shown, you are only using 5 of the possible 16 addresses, and I'm sure you have uses for the others in mind. I have some suggestions:-
* 2 or 3 more of the 1 byte memories (call them registers or accumulators)
* A counter that increments (or decrements) when selected for write, and presents its count for read.
* Another 1 byte memory acting as an "Instruction Register" (IR) for:-
* Two 74181 4-bit Arithmetic-Logic-Units (ALU)s that take inputs from 2 of the registers (or counters), with the
operation governed by 4 bits from the IR. (the ALU can do bit shifting also)
* The other bits of the IR could be used to select which registers/counters become the operands to the ALU.
* One of the IR bits could implement conditional branching:-
It would enable setting a "Skip" flip-flop when, for example:-
* The ALU sets its A=B comparator output.
* Some other bit in the system (say the MSB of a register) is a one
Then divide the system clock by 2 (or is it 4?) to make a 2-phase clock. The Program counter is always incremented to the next program address on one phase, and incremented again on the other phase if the Skip FF is set (and then clear it)
* I just saw someone else talked about putting the PC into the address space, which is very neat. It can implement a jump that may be skipped over. (like an AVR)
* A 4-bit register that writes the read address into its low nibble, to load an immediate value. (or use two addresses for 8 bits)
* Implement these 16 addressed functional blocks as pluggable modules to allow customization and experimentation with new ideas.
* Use a PC via USB connected Arduino to download "programs" into the 6116.
* Write a PC based IDE/assembler/compiler for it.
I'll stop now, but the possibilities are almost boundless... (could involve a lot of wiring though)
Why does the static RAM reset with power-off? I always thought static ram retained it's contents w... Forget it, static just refers to being "not dynamic" ie not requiring dynamic refresh... (mutters something indecipherably) YOU KIDS, GET OFF MY LAWN!!
DRAM uses capacitors which will slowly discharge and lose the information stored if it isn't read and re-written periodically. SRAM uses electronic gates which don't lose their state if they aren't rewritten, but will lose their state if they are unpowered. NAND Flash memory uses floating electronic gates which are electrically isolated from the rest of the chip (they use a very high voltage generated on-device to push through the isolation during writes)
i really do enjoy the chip on breadboard series. much more charm than the newest and latest.
Thank you for taking the time to share. Creating a work around 2 6551 cmos ram using a 5116 in a Game plan Pinball machine called Sharpshooter
You keep these things going, and my head always goes to the on-board computer for the Jupiter One on Lost In Space, one of my all time favorite sci-fi shows out of my past! I have always wanted to build a display sort of a miniaturized LIS compute display. While I never saw any intelligence in those flashing lights I just thought they would look cool. I would really like to build something like that and stick it in some vacant space on the huge dash board of our Class A Motor Home, just to make guests scratch their heads as to what sort of system I had hooked up in it when they visit.
Really enjoying these computer building block style videos :)
Julian and Ben making a breadboard computer, awesome!
That Ben guy started a new trend.
Certainly looking forward to seeing how your computer will work in practice. It seems like Ben Eater's inspiring plenty of people to go out and design/make their own unique computers, myself included. I've mostly completed the design of a simple(ish) but still very powerful 8-bit TTL computer. I do find more unconventional computers, which squeeze the most power out of the fewest gates to be the most interesting, though. Good luck!
I ended up using a 6116 as a pixel memory in a display circuit - was quite amused that when it powered up it displayed random garbage pixels!
Nothing neat like 0xFF or 00, all bits were unrelated! :)
Like chips on bread!
hell yes bit of brown sauce too
Hi Julian - I'm repairing an old video game board and it has an NMOS 2048 x 8 Ram on board which I believe may be faulty (D4016).
Would it possible to replace this with a CMOS device 2048 x 8 RAM like the 6116 that you are using here, please? Would it work? They appear to have the same pin-out. Thank you
Excellent. Looking forward to following this adventure! Best wishes.
Keep up the good work, looking forward to following along with your computer on a breadboard project
Another great one! Thanks for sharing your knowledge and your gift for experimenting.
Invest in an LED bar array.
Or at least 2x5x7mm rectangular LEDs.
Search for 257 (or 234) LED.
Beautiful. I may have to play along at home for this one.
Can you add a link to the channel you referenced? The other guy working a similar project.
Looking super forward to some of those breadboard computer videos! When I was younger I had a lot of experience making computers in a game called minecraft using very similar logic that is used by real computers. The only thing I never understood is why a clock is needed. What is the point of a clock when you could just have a line that links the path between different components?
So, you´re about to buildup your personal DSP system on a breadboard...nice! :)
I love this Julian. Elegant in its simplicity. I look forward to following along. It looks like a candidate to eventually be housed in a case with LEDs and switches mounted on the front like an Altair 8800 type of thing. That I'd like to build. JU-6116?
Love these Chip on Breadboard videos! :) I dug out an old 16KB expansion cart from my VIC20 and found that it has 8 6116s and a 74139. Want to play with them and an FPGA mini dev board, but it's 3.3v. Can you recommend a chip for level translation? I think I need 8 bidirectional (data), and 14 unidirectional. Never had to do level shifting before.
Julian, how do you get the RAM to accept the IO lines as High when you pull Write Enable to ground? I've replicated your setup and when I pull WE to ground, I am writing all zeros. I have to force the IO high to actually accept it. Is that a peculiarity of your Toshiba 2016 vs, say, an ST M6116LN?
Does thise static ram need any kind of programming
An interesting idea, but rather than having 4 "read" lines and 4 "write" lines, I'd suggest having 4 "read/write" lines with one logic state being "read" and the other being 'write" plus 4 "enable" lines.
The idea of this configuration is to prevent the possibility of accidentally reading and writing from and to the same "register" which is a possibility with your suggested configuration. Allowing each register to only read or write but never both at the same time will prevent any possibility of "shorting" outputs to inputs of the same register.
That would make each instruction a copy to Transfer Register copy from Transfer register pair with an assume Transfer Register with no address.
It would start to look like a microcoded CPU.
Actually, since there's no intermediate register, it would be an Output to bus / Input from bus pair.
Presuming that "write" is high or 1 and "read" is low or 0 and "enable" is also active low or 0, one of the Read/Write lines would be taken high and a different one would be taken low, then the corresponding Enable lines for those registers would both be pulsed low to perform the copy.
Of course there would need to be some careful timing to ensure the Enable for the Output does not go high before the Enable for the Input goes high, otherwise invalid data would be latched into the destination.
Neat idea. I'm also considering a 7-bit address and a direction bit. This would provide 128 addresses which can be moved to and from an unaddressed accumulator.
Hi Julian, watching your videos I realize I still have tons of things to learn.
About your new project, do you know the Ben Eater channel? It's very interesting as well.
Best regards!
The curly toshiba logo is my favourite semiconductor company logo - iirc they kept it going on the chips for quite a while after starting to use the boring modern logo on tellys etc.
but of course they went boring on the chips too eventually.
Hey Julian, loving the new "Chip on Breadboard" videos, please keep them coming. incidentally, are the UART and Static RAM from the big box of ICs I sent you last year?
Hi Derek - not those two, but the CMOS 4046 phase locked loop came from that box - thanks again :)
Is it okay to try and power LED's directly from an IC's pins or would it be better and safer to attach them to transistors?
RAM that ROM
Hi Julian, I know I'm far too late! (2 years). But it would be nice to see this done with a ROM chip.
I've made (a while ago) a Virtual machine with Arduino, it NEEDS a LCD shield and I can program it in Assembler. The virtual machine has 256 bytes of program memory (it's enough), 16 nibbles of RAM, can access the buttons as imput and 6 LCD characters as an output. The only way to program it is via the LCD Shield. I'm gonna upload it and put a link tomorrow.
@Julian Ilett - could you make another episode with HM6818P?
Hi, and thank you for sharing all interesting videos! I have looked around at ebay after that white 2-pole connector you are using, but i can't find it. Do you know where i can bye those connectors? /Stefan
Where did you get the led's?. Also what is that white connector? Where did you get it?
yes... have a lot of them laying around here - they are from an old amiga or c64
For me it looks more like TTA architecture. While technically TTA is an OISC, it is not completely true. You rely on data move/copy to implement different instructions and by changing what every memory location does with the data, you choose what specific word of program data is going to do. Thus you make different instructions. Typical OISC treats all memory locations equaly (with the exception of MMIO devices). I've built both in FPGA and there are some major differences between them, in hardware and programming techniques as well. And BTW… I think you want to make Program Counter available for writing in the address space so you can implement branches (little tip: you can share addresses of read only and write only registers to save some of the, very limited, address space).
Yes, I'll move the program counter into the data address space at a later time to implement GOTOs. Initially I'll just connect one of the program counter's flip-flops back to its own RESET input to create different sized loops and have a PRESET facility on the program counter to facilitate the setup code. Address space can be expanded by by having a seven bit address and a direction bit so you can write from and to an accumulator.
Makes sense for early testing.
Using a chip LH5764/J, first time hooking to breadboard , without the LEDs, to get the hex address in it, using Arduino nano, do the USB from nano power the chip to cycle through the read address in hex file output? Or does the breadboard need it's own 5volt required by the LH5764/J, @julianilett, @q12x
its a good project but i don't swallow the concept to use 2 chips to utilize a 3rd one..maybe a good learning excersize..can u make a similar project for thise ddr2 /3 laptop Sodimm ram modules?
i saw ben eaters breadboard computer and i was having trouble finding a set of 74ls189 64Bit ram 16 Words x 4, is this chip a good replacement for the ram module he's using?
You can use it (and maybe any SRAM). This one (the 6116) is a good replacement. Just tie down (or high) the not used adresses pins, and use the other pins as it were the ls189.
There is no need to correlate the bit number with their marking (i.e. you can use DB4 for other bit), as long as they're used as intended (i.e. data bus for data, and address port for addressing it).
Certainly much easier to source.
Definitely, much cheaper too, i usually grab more than i need so i was going to get 3 74ls189's(only needed 2) but it came to about about £20-25(including postage), however 2 of the 6116 Sram Chips came to about £5-8(including Postage)
Really? De-fi-ant-ly?
Also, I don't know where you guys have been looking, but aliexpress has lots of 74ls189 from $0.50 a piece, and lots of 6116 from $0.63 a piece, plus a bit of shipping here and there.
Anvilshock Woops, I did not notice I spelt that wrong, but you know what I meant, anyway it's too late now I just bought 2 of these chips for £4 off ebay.
Julian, I get what you say about the OIC thing, but I think it would be better if you add some kind of branching capability, like jump if carry, jump if zero, and so on. Without that, you can't do anything "more" complex than standar additions or subtractions. I know you might write a long code that can do slighter complex things, like multiply (adding things repeatedly), but you know...
That may be possible with a flags register and a writable program counter mapped into the data RAM space.
Yes, for instance, when you execute a jump if zero, you only need to check if the last operation set the zero flag. In that case, move the lower data (from the instruction, which holds the jump destination) into that PC mapped in RAM space.
I don't think it would be necessary to map the flags register, just use it as an internal thing. I'm looking forward to this project!
Santiago Hormazabal when I was looking into oisc, "subleq" seemed easiest in term of programming, though I haven't thought about how to do the hardware.
oooh at 3:15 - discussing the datasheet while the chip runs underneath.... :D
The pauses from the blue LEDs seem to occur when the red LEDs shift over.
What capacitance are those capacitors? Thanks!
looks like decoupling caps or tantalum
Lost me... how is the rotating globe project going?
Miss two instructions. Conditional jump (load address to program counter) and a adder.
Then I think it would be able to be equivalent to a Turing Machine. :-)
Very interested in building this along with you, will you be doing step by step, part lists and provide further reading links so we can all keep up?
Probably build it all, then go back and describe it all step by step.
Sir does blinking duration depends on room temperature? Thanks
Its going to be a cobb (chip on bread board) you should call it the cobb project
should call it the Cobb Job
If you put the LEDs and DIP switches at the same address, that gives you 15 registers instead of 14.
I'd add an inverter register and a Zero ie 0x00 register, which would give you the ability to set a register to 0x00 or 0xFF in just one or two M states.
If you want to be fancy a Mask and Result pair, either XOR or AND (or one of each)
Yep, all of that stuff. I'm also thinking of an 8-bit latch where the address lines are connected to the data inputs - it would emulate a ROM full of literal values.
OISC = super duper complex blinkenlight :-) ?
HAHA
9:06 proud moment
My red leds work fine up to (and above) 2KOhm and draws about 2 mA there, still showing clearly if lit or not.
Havent seen one of these since I fudged a few into my ZX81 to make it 8k static ram (Using either a 74138 or 74139 as address decoder I cant remember which). That was in 1983!
138 iirc is the 3 to 8 line demux with active low output (as used for chip select), so you must have been planning for an upgrade to 16k when the price of SRAM came down :)
The irony was that a Z80 can refresh DRAM by itself, but not many people understood that magic.
I'll be using the 74LS138 as my memory address decoder - perhaps as many as four of them :)
@MattOGormanSmith It was nothing to do with refresh. 4116's you need 8 as a minimum and you cant battery back them. I could have used a single 6116, and 8 off 4116 was more expensive than 4 off 6116.
Julian Ilett would you be interested in getting your hands on an FPGA board to evaluate? I should have some batch 1 production units in less than 2 months. There is no programming cable required if you have a Raspberry Pi and they can either work with one or stand alone. I also have some digital indicator boards (16 bit) for demo and basic debugging if you want to try those out too.
Do ram chips really have random data when registers are empty? I'd assume each bit to be 0 after a power off.
Maybe the pins are pulled high during reading causing the blinking?
It is random data. If you look at the circuit for sram you will see that it is two NOT gates back to back. When initially turned on they will 'fight' each other until they reach a stable state of 1 or 0.
I do have a nagging but feint recollection of some minimalist programming language way back in the very early eighties. One of those things that breathless TV presenters seriously suggest would turn british school children into Bill Gates or Paul Allen. Anyway, that was similarly reduced instruction and just required a different approach to the algorithm. I just know if I can remember the details it would be of use. Of course it is just as likely to be early onset dementia (OK, maybe not that early).
Impressive how you simplify things. Reading and writing to RAM, and flashing LEDs with Z80 in previous video!
It looks like data bus is connected to LEDs and to resistors to ground. I wonder why ones are written to the RAM instead of zeros when you pull write low?
Thanks
If I had to make a guess, it would be that the forward bias voltage of each LED when combined with each resistor is too high to pull the data lines to ground against the internal pull-up which is automatically applied when the data lines become inputs.
Is asserting read enable and write enable maybe a shortcut to writing FF? Maybe for testing or blanking?
When are you going to finish the vocoder?
/me ducks
It looks (from the data sheet) like taking /WR low actually disables the output drivers.
Ah yes, the vocoder - my big analogue project :)
Julian Ilett If as you suggest that pulling the WR line low disables the output pins, then you've committed the cardinal sin of CMOS, you have floating input gates.
It can't be the LED's / resistor chain tying the inputs to ground, that would result in all lows being written wouldn't it ?
Very much like!
Yaaay, another Transport Triggered Architecture (TTA) CPU!
Sooo... It's gonna run crysis in fulHD?
+Ablaikhan Bennett If you put more memory and clock it at one Yottahertz, you can run decent games on it.
Integrated Electronics i reckon that protoboard cannot go higher than 1 TeraHertz clock 😉
Demential task: implement Harvard architecture with von Newmann specific hardware 😁
What value of resistor are you using on your LED's?
150Ω which is probably OK for the blue LEDs, but not so clever on the red ones.
blue leds remind me of morse code lol
So a one instruction BrainF**ck processor? Neat!
Not going for a Turing complete architecture just yet then ;)
It could get pretty close by adding more arithmetic and logic elements.
and more data memory :)
You should make it so you can also address the PC.
I'll do that later on :)
Now once you have the computer built, rebuild it with opto-isolator logic >:)
Sadly, I don't think opto-isolator logic will work because the fan-out is less than 1 :(
CAN THESE CHIPS HOLD PROGRAM WITH OUT POWER
NO. YOU HAVE TO USE A BACKUP BATTERY OR USE TIMEKEEPER RAM. TIMEKEEPER RAM IS A RAM CHIP THAT CONTAINS RAM BUT ALSO A BACKUP BATTERY AND A CRYSTAL OSCILLATOR BOTH FITTED IN THE CHIP PACKAGE.
+Integrated Electronics IN THIS CASE YOU DONT NEED THE CRYSTAL OSCILLATOR BUT ITS NOT A PROBLEM.
WILL a 18650 cell work I have tunes of them
18650 is a 3.6v cell, so check in the datasheet the voltage range of your RAM.
3-5 volts so I am still good a 18650 cell charge cutoff voltage is around 4.2 volts
first 😜😜 can you do more postbags please?
Another Postbag coming soon :)