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Oh God, finally very good explanation! Many Thanks! :)
its perfect..u deserve subscription
Excellent sir tqsm it's very helpful to me and attractive expilination tq sir
Good Explanation my friend Tq I got it, add about FET & MOSFET in detail
Thanks for explanation sir... So helpful❤
Thank you sir best explanation ❤️
very good video
Thanks a lot for the video
great job
Short and useful, thanks. I have ssen some diode inside of JFETS. 10 or 20 second, explaining that should make your video completed.
Wonderful explation
Good explanation
Superb sir
Very nice
Thank you sir
Good good thank you sir
Super bro
Easy to grasp ...It would be better if Charcterstics also explained.
Ok
💜💜💜
Good fact buddy
Thanks
Thank ❤
informative
thanks
😍😍😍😍😍
Your gate to source voltage is totally wrong bcoz JFET has always reverse bias and gate is negative voltage for N channel and positive for the p channel jfet remember always.......
Your right
Yes you are correct
good
👍
This is good but how is all this applied in a real word circuit.
Yes we don't operate N-jfet with Vgs as 0v or gate positive wrt source. But your diagram shows Vgs positive. how come?
The symbol is positive but the value is negative. If the symbol was reversed, then the value would be positive - either are equivalent.
here we should give reverse bias for gate, you given forward bias
Kk
Oh God, finally very good explanation! Many Thanks! :)
its perfect..
u deserve subscription
Excellent sir tqsm it's very helpful to me and attractive expilination tq sir
Good Explanation my friend Tq I got it, add about FET & MOSFET in detail
Thanks for explanation sir... So helpful❤
Thank you sir best explanation ❤️
very good video
Thanks a lot for the video
great job
Short and useful, thanks. I have ssen some diode inside of JFETS. 10 or 20 second, explaining that should make your video completed.
Wonderful explation
Good explanation
Superb sir
Very nice
Thank you sir
Good good thank you sir
Super bro
Easy to grasp ...It would be better if Charcterstics also explained.
Ok
💜💜💜
Good fact buddy
Thanks
Thank ❤
informative
thanks
😍😍😍😍😍
Your gate to source voltage is totally wrong bcoz JFET has always reverse bias and gate is negative voltage for N channel and positive for the p channel jfet remember always.......
Your right
Yes you are correct
good
👍
This is good but how is all this applied in a real word circuit.
Yes we don't operate N-jfet with Vgs as 0v or gate positive wrt source. But your diagram shows Vgs positive. how come?
The symbol is positive but the value is negative. If the symbol was reversed, then the value would be positive - either are equivalent.
here we should give reverse bias for gate, you given forward bias
Kk