Reducing Inrush Current in DC Motors With PWM

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  • čas přidán 2. 08. 2024
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    PWM motor speed controller, with pulse-by-pulse current limiting reduces inrush current.
    Small DC motor typically has stall current of about 5x the rated current. Motor with 3A rating can therefore trip power supply's protection circuit that has 10A max current, if it is very sensitive/quick! Limiting the current to motor's rated current (or little bit higher) is often enough to make motor work just fine, without tripping power supply's over current protection.
    I created example project using simple PSoC 4 chip, CY8C4013SXI-400, using it's PWM component. Main feature I was taking advantage of was "Stop" signal, which allowed me to disable PWM output pulse if current was too high, that's something not readily available in many other microcontrollers. Microcontrollers that don't have this function in their PWM timer can still be used, be bitbanging the PWM in code and monitoring comparator's output.
    0:00 Intro
    0:33 PCBWAY
    0:50 DC Motor's Voltage and Current
    1:48 Pulse-By-Pulse Current Limiting
    2:15 PSoC PWM Configuration
    4:05 Source Code
    4:33 Schematic
    6:00 Outro
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Komentáře • 6

  • @dagobertkrikelin1587
    @dagobertkrikelin1587 Před 5 měsíci

    Just what I needed, thanks!

  • @AdityaMehendale
    @AdityaMehendale Před 5 měsíci +1

    Nice application of a PSOC!
    I'd recommend a freewheeling diode across the 4:43 connector J1 (Motor o/p) to protect Q1. Perhaps also a pull-down on the gate of Q1, if the boot-up behaviour of the PSOC is ill-defined.

    • @Hackvlog
      @Hackvlog  Před 5 měsíci

      Forgetting the diode was quite an oversight. Motors or relays without freewheeling diodes really are like kryptonite to mosfets/transistors. Also good point on importance of the pull-down resistor! Thanks for these tips!

  • @mumbaiverve2307
    @mumbaiverve2307 Před 5 měsíci +1

    very nice video. as an alternative can we use an AND gate with the PSOC PWM and the comparator output ?

    • @Hackvlog
      @Hackvlog  Před 5 měsíci +1

      That is a start, but not a perfect solution. To prevent high frequency switching, output going to the mosfet/transistor should go HIGH when PWM pulse starts and go LOW on either a)end of PWM pulse or b)if current limit is reached. No matter which reason made the signal go LOW, it should return to HIGH only when next PWM period starts.
      I'm sure there are solutions for doing this with regular PWM (without the stop-signal used in this video) and some logic gates or flip-flops, but I haven't thought about it any further.
      Thanks for watching and commenting!

    • @mumbaiverve2307
      @mumbaiverve2307 Před 5 měsíci

      @@HackvlogGood point. I did not think of that.