The design for the protected mode Z80 computer is complete!

The schematic for the HEC is complete! However, routing PCB for the HEC proves to be extra difficult, especially for someone who hasn't got a lot of experiences routing PCBs in the past, like me. I have spent the last week navigating the maze of complex timing of Z80 and TTL logic gates. And the prospect of another few weeks of grinding is quite exhausting. Therefore, I decide to take a small break from the project for now.
If you have experience in PCB layout in KiCad and would like to help. Please leave a comment below or contact me via Patreon or join the official HEC Discord server. I would be glad to answer any questions related to the circuit.
Patreon link: / andy18650
Discord server: / discord
GitHub repo: github.com/Andy18650/HEC-Mode...

[@steveroberts3512]

Why don't you try breadboarding the system using Z80 at 1MHz to check the design first? Then you can progress to PCB design. I also think that there are a browser based simulators that you can run your logic on to check it. Also out of interest have you analysed/checked the logic using boolean algebra? I'm looking at the RC2014 system at the moment. I may build this before progressing to my own design.

[@andyhu9542]

I have built an RC2014. The problem with breadboarding is the scale. To put so many chips together with breadboards will be hard, and constant loose connections would grind the testing to a halt. Browser-based simulators usually don't simulate the latency of the logic gates. Those latency issues caused more than half of bugs during the design process. Therefore, even if the design passed the simulation, it may still fail on PCB.