10 Things about OVM for SystemVerilog

Describes ten things you should know about OVM, the Open Verification Methodology for SystemVerilog. This video gives you a top-level technical overview of OVM without diving down into too much language detail.

[@gurucharapathy]

Thanks a lot. Very useful.

[@sankarlovesu]

Thanks.,.for the new user to OVM it is very very useful

[@JamalNIQUE]

Thanks it is very interesting

[@saikatsana]

Thanks.....