How to Reduce DC-DC Converter Output Ripple

Steve Butler, V.P. of Engineering at VPT, discusses the definition and causes of common mode and differential mode output ripple and simple, effective ways to control output ripple.
www.vptpower.com/
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[@netman69]

There do exist ceramic ones of big values like 10µF, 22µF, 47µF and even 100µF. Never ran into them in any commercial equipment tho (probably cause electrolytics are cheaper), but you can buy them.

[@Purple__]

Thanks a lot for this video!

[@VPTTECH]

VPT's engineer recommends 20uF = 2 x 10uF in parallel.

[@snowkoolanan94]

Is reducing the ripple greatly below the tolerance levels useful in any applications?Once stability is achieved to a certain extent is there any use of further increasing the stability?In which applications does this make a difference?

[@happyhippr]

awesome thanks for this video. esp explanation of where to place low esr capacitors

[@VPTTECH]

You're very welcome!

[@jonesr227]

I think there are two different things being discussed in this video: 1) the output ripple, and 2) the switching noise appearing in the output. What is actually is being reduced here by the addition of the ceramic capacitor is primarily the switching noise not the ripple.

[@minghaojin6063]

agree, the output ripple is predominately relying on the inductor thereof. but I do not fully understand how LC filter affect the transformer.

[@HemangJoshi]

Dear sir, Please can you provide formulas pr equation for calculating parameters for this designs. Perhaps I really liked this video over others...

[@VPTTECH]

Thank you for watching! Please see our website www.vptpower.com for more product information.

[@jenpau0269]

ceramic capacitor is picofarad right,..??
not a microfarad,...??
its pF not a uF