Programable Array Logic & ET4000 /W32 acceleration coding

How did hardware accelerated started in the 90s? Let's low-level program an #Tseng #ET4000. Also PALs - Programmable Array Logic. #Ad: graphic cards @Amazon: services.exact... You can support my work at: / renerebe
exactcode.com t2sde.org rene.rebe.de

[@MoreReneRebe]

PS: works so much better actually waiting for the ACL engine being idle before filling the queue and launching the next engine command ;-)!

[@superfury1]

I'm trying to implement the ET4000/W32 (or perhaps the W32i variant, whose only documentation I can
find) in my emulator(UniPCemu).
I'm currently struggling with 3 things:
1. For some weird reason, Windows (3.x&9x) doesn't enable the MMU memory mapped registers, waiting infinitely due to waiting on the 'status register' which due to a floating bus always reads 0xFF(because CRTC register 36h is 0x43)!
2. Any idea what effect the x/y wrapping of the pattern/source has during runtime and when starting an new ACL operation(on the initial pattern and source map address, internal x/y counters for those and related state, also the same for subsequent bytes when processing(very badly documented?)). Also, how are the x/y registers themselves handled? Are they always cleared to 0 when loading them from the queue? What about their effects when non-zero?
3. Any idea what effect the KEY(as written to I/O port 3BF and 3[B/D]8 to set and clear) has when cleared on the extended CRTC registers when reading them(other than indexes 0x33/0x35)? Also seemingly nowhere documented? All emulators I can find implement different results(just read, read 0, float bus?)?
Any idea about those?
Edit: Forcing the behaviour of register 36h as if the two MMU bits are always set causes Windows 95 at least to boot (with some weird graphical glitches, like missing text, missing windows and backgrounds for windows, missing start menu background (icons and blue active color work fine on the icons, though) and missing desktop icon text? Also a part of the startmenu is rendered in the wrong position somehow(because the ET4000/W32 MMU window #0 (at the start of the memory mapped registers, the very first register) is somehow programmed to 0 during said rendering, which is obviously incorrect?).

[@pizzapanni]

hi, are those monitors 1440p 1080p?

[@MoreReneRebe]

I little larger 1200p 16:10. On my main desk I use a 3:2 4k+ 28" Huawei Mate View