Microwave Diode Sampler for PLL

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  • čas přidán 11. 09. 2024

Komentáře • 52

  • @AllElectronicsChannel

    Support the channel becoming a Patron
    patreon.com/allelectronics

  • @gammaleader96
    @gammaleader96 Před 2 lety +6

    I love how much joy you have in your face while explaining the circuit operation.
    There is always a big difference from going through the theory to getting it work in the real world.
    I think this is a skill that is shown and teached way to less, so it is great to see you go through it in detail.
    Looking forward to the next episode.
    Maybe it would also be cool to build a frequency counter out of your sampler.
    By having two known LO frequencies, you can calculate what the RF signals frequency was based on the IF.

    • @AllElectronicsChannel
      @AllElectronicsChannel  Před 2 lety +1

      Thanks!! I tested the idea of a frequency counter on the bench, and it works beautifully!!
      It needs to be our next project!

  • @rjordans
    @rjordans Před 2 lety +2

    Thanks for the update again, interesting idea to use the inductive kickback for getting the high pulses. I'm looking forward to the test results!

  • @ThermalWorld_
    @ThermalWorld_ Před 2 lety +1

    Thank you for the great video and for the enthusiasm you put into the explanation.
    I learned so much from your simple but effective explanation.

  • @yasirshafiullah3016
    @yasirshafiullah3016 Před 2 lety +2

    I love the way you teach and implement things.. This is amazing

  • @vmiguel1988
    @vmiguel1988 Před 2 lety +4

    I think it is important to state that the RF signal voltage needs to be less than the diodes junction voltage otherwise it would work as a rectifier and not have the switching behaviour. Also the capacitors must be of high quality at least C0G but best would be Teflon ones.

  • @weinihao3632
    @weinihao3632 Před 2 lety

    Impressive! I would have assumed that uncertainties and drift in switching of this construction would cause jitter on the timing window which would result in a loss of a clean aliasing signal.

  • @SKempe
    @SKempe Před 2 lety

    Thanks for the great explanation with so much love and fun, i love it

  • @matthewgilliam7720
    @matthewgilliam7720 Před rokem

    That blew my mind.

  • @ClaudeDufourmont
    @ClaudeDufourmont Před 2 lety

    Very interesting, thanks

  • @AllElectronicsChannel
    @AllElectronicsChannel  Před 2 lety +1

    Hi guys! You can support the projects being a Patreon patreon.com/allelectronics

  • @a360d
    @a360d Před 2 lety

    Awesome video!

  • @creatingawareness1947
    @creatingawareness1947 Před 2 lety

    Awesome stuff mate 😄👍🏼 learned allot from you. Tnx for sharing. Looking for stable hf switching modes.

  • @borisj4054
    @borisj4054 Před rokem

    Would like to know about the maths of the conversion. Eg. Pulse width vs frequency conversion factor.

    • @AllElectronicsChannel
      @AllElectronicsChannel  Před rokem

      I think that for an idealized model it is not difficult to derive, as it behaves exactly as a time domain sampler

  • @ramanarao32
    @ramanarao32 Před 2 lety +1

    very very nice !! thanks professor Gregory!!! i have attended for the first time , a nice class after 40 years of my engineering graduation!!! LOL !!! can you please tell me what happens to the phase noise , if we generate 3GHz from a 100Mhz ultra low phase noise Lo? thanks

    • @AllElectronicsChannel
      @AllElectronicsChannel  Před 2 lety

      We need to test and investigate! I understand that this can be a lower phase noise method than prescalers because it's high gain, from the harmonic amplification.
      But the theorical limit os 20 log (N) will not be break

    • @ramanarao32
      @ramanarao32 Před 2 lety

      @@AllElectronicsChannel then there is no difference between freq multipliers and sampling phase detector!!

    • @AllElectronicsChannel
      @AllElectronicsChannel  Před 2 lety

      I think you are right !! I found a nice paper about it, search Google for "sampling PLL phase noise". It seems the sampler indeed don't have the N^2 noise !!

  • @TheRavasios
    @TheRavasios Před rokem

    Great explanation
    I´m quite new in this field, so please forgeve me for my probably silly questions.
    1) As you said, when the diodes are on conduction, the 3,3GHz wave is sampled and it change the charge of Hold Capacitors.
    Does it means that the Strobe pulse is a reall really fast pulse, ( shorter than the 3.3GHz period) is it correct?
    2) When the 2 STROBEs signal comes, why the hold capacitors charging are a not influenced?
    Thanks in advance.
    Sergio

    • @AllElectronicsChannel
      @AllElectronicsChannel  Před rokem +1

      1) yep! Actually what matters is the fall time. It needs to be really fast, to open the diode, storing a snapshot of the signal. The width of the pulse doesn't matter much..
      2) Really good question!! This is why we use a balanced topology! You see that the voltages generated by the pulses will cancel each other, because they have opposite polarities! The degree of balancing impacts the rejection of the strobe pulses at the output.
      Welcome to the channel!

  • @ltlt6117
    @ltlt6117 Před 5 měsíci

    Hi how much is the maximum input voltage of this sampler?
    What is the main difference of 2diode and 4 or 6 diode samplers?

  • @SandeepKumar-jj7zi
    @SandeepKumar-jj7zi Před 2 lety

    Nice, I have a doubt, will the current balun not shunt away the high freq differential signal generated by SRD ?

    • @AllElectronicsChannel
      @AllElectronicsChannel  Před 2 lety +1

      The pulses have very high frequency content that is easily blocked by any leakage or parasitic inductance of the balun

  • @prutser67
    @prutser67 Před rokem

    Is this the same as the harmonic mixer as used in many spectrum analyzers ?

    • @AllElectronicsChannel
      @AllElectronicsChannel  Před rokem

      It could be.. but in general , the Harmonic Mixing means a normal mixer working with an harmonic of the LO

  • @rezajadidi9242
    @rezajadidi9242 Před rokem

    Hi
    I can not pay in patreon and see schematic .
    Please give free
    Thanks

  • @user-gn9mk4ge2b
    @user-gn9mk4ge2b Před 6 měsíci

    can you please explain why the pulse doesn't charge the capacitors? If the pulse creates voltage across the capacitors and the diodes together, and momentarily current flows through the open diodes, then why doesn't this current charge the capacitors?
    Second question, why inject the pulse on the outside of the capactors? Why not just connect the pulse generator directly across the diodes?
    Thank you!

    • @AllElectronicsChannel
      @AllElectronicsChannel  Před 6 měsíci

      (1) It charges, but differentially. +pulse at one side and -pulse, at the summing point the pulse voltage is nulled.
      (2) To not disturb the DC bias on the diodes.

    • @user-gn9mk4ge2b
      @user-gn9mk4ge2b Před 6 měsíci

      @@AllElectronicsChannelthank you for your quick response. I am afraid i still don't understand it :). if you have a power supply with negative and positive terminals (e.g. +-12v) and you connect a capacitor between the terminals, it will charge (it sees 24 volts, not 0 volts). Can you please explain where am i misunderstanding your logic? Thanks in advance, and keep up the good work!

  • @gabrieloliveira8955
    @gabrieloliveira8955 Před rokem

    Ainda me lembro dos primeiros vídeos: Falaa galerinha do all eletronics.

  • @teerath1000
    @teerath1000 Před 2 lety

    What's the logic behind multiplying by 30 2:49 sec

    • @AllElectronicsChannel
      @AllElectronicsChannel  Před 2 lety +1

      Because we are using the harmonic number 30 to downconvert the signal. It is the 30rd spurious that is downconverting the 3.33GHz signal

  • @leomartihart
    @leomartihart Před 2 lety

    yahuuuuuu!!!!!!
    PLL enbreve!!!!

    • @AllElectronicsChannel
      @AllElectronicsChannel  Před 2 lety

      yep!!

    • @leomartihart
      @leomartihart Před 2 lety

      @@AllElectronicsChannel I was thinking ...
      To ensure that the sample point is similar to the previous pulse width of Strobe should be very short, less than a cycle of 3.3GHz (0.3 ns). Does that generate it with the shotky diode peak?
      as you say, beautiful idea !!!

    • @AllElectronicsChannel
      @AllElectronicsChannel  Před 2 lety

      Yes!! This narrow pulse is generated by the Step Recovery Diode* pulse!
      The transition time is something like rise time 150ps, to ensure a very narrow width, I used more resistors to bias the diode bridge, so it is only sensitive to the very narrow peak of the step recovery action.
      I think also that the width is less important than the rise/fall of the pulse.. because it doesn't matter if the switch stays closed for more than a cycle, it is important that it changes state faster than the cycle!
      What do you think ?

    • @leomartihart
      @leomartihart Před 2 lety

      1- The starting time of the Strobe pulse should be able to load the capacitor => The 3.3GHz source must have the appropriate impedance for in 150ps to transfer that amount of energy.
      2- The time of closing the SW should be very precise ... really that would look good to see it work. I think it's an ambitious, but if it works it will be very good and useful. I am looking for a prescaler to make a pll of 10GHz.
      I'm following your publications.

    • @AllElectronicsChannel
      @AllElectronicsChannel  Před 2 lety +4

      It works beautifully! Next video I will show it. The IF output has more than 1Vpp, easily can excite logic circuits directly. This sampler also can be useful for frequency counters, working like the olds HP microwave counters. Maybe our next project !!