1 3 2 Canonical 5 Stage Pipeline

[@Spinogrl2000]

THANK YOU! My professor has never broke this down for us in such a comprehensive way. Thank you for taking your time to explain each step and why they are relevant.

[@michaelscience2481]

Thank you so much Dr. Ben for explaining this tough concept. I was confused by my instructor in this concept , but now I understood the concept very well.

[@memeingthroughenglish7221]

Vielen Dank!

[@chenjiajing5475]

very nice course, appreciate for sharing

[@lcm1964]

Excellent class!

[@tharangamadhusankha]

Thank you. Very clearly explained.

[@selvalooks]

Made it in a understandable way !! Thanks Sir

[@ProdemocracyCN]

Hi professor, I think there are some nosies in this video and I will some improvement in the future. Thanks for your deligent work

[@pamp3657]

GOOD VIDEO!!!! 🐐🐐🐐🐐🐐

[@lpi3]

Very nice and clear explanation! Thank you!

[@kayakMike1000]

Each part of the cpu core works in parallel. Though sometimes memory acceses can take multiple clocks...

[@jimmyzhang1732]

13:05 It should be the line on the bottom of the yellow one, the yellow one is to send the next instruction address.

[@piyushkumarmadhukar4703]

noice

[@protektwar]

8:54 64bit/32bit depend on the MIPS type

[@MrHeapAllocator]

Second