2 way set associative cache mapping: Hit and Miss

This video is on set associative cache mapping. 2 way set associative cache mapping has been explained by using some referenced addresses. Then hit and miss of different address has been find. By which hit and miss ratio can be calculated. Firstly, offset bit, set bit, and tag bit has been calculated. All the addresses are converted from hex to binary. after that hit and miss is find. Lease recently used (LRU) cache is also explained and found.
Consider a 2-way set associative cache with total capacity 128 Byte, 12 bit address, and 32 Byte blocks. Initially cache is empty. Find the map addresses 2-way set associative cache and indicate whether hit or miss for the following memory referenced addresses?

[@ti6252]

my final is in 4 hours
this really helped me thank you

[@digitekkeys2024]

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[@LamNguyen-jp5vh]

Thank you so much! Subcribed!!

[@digitekkeys2024]

Thanks

[@samuelchibinjimwanza443]

Thank.you

[@elaanmoazem286]

thanks, good work

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[@apollon-peterkallipolitis632]

I saw that in this example we always changed the tag of the way1. I wanted to ask whether that depends on the LRU number or if it doesn't. Do we always change the way1 tag or the tag of the wayX with X being equal to the LRU.

[@sms22782697]

May l ask why it needs 2nd comparison?? if l just visit 1 times those address, is it only need 1st col? thanks!

[@digitekkeys2024]

In cache organizations, the 'SET' address identifies a set of '2' cache lines, the cache is said to be 2-way set associative. If the cache organization is such that the 'SET' address identifies a set of '4' cache lines, the cache is said to be 4-way set associative. So you need to map for each cache line. Sometimes in questions it is asked find hit ratio for second cache.

[@m8121]

Didn’t understand at all