Tri-state logic: Connecting multiple outputs together - 8 bit register - Part 2
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- čas přidán 6. 09. 2024
- With tri-state logic, a logic gate can be effectively disconnected from the circuit rather than assuming the normal 0 and 1 logic levels.
This video goes into more detail on what it means to output a 0 or 1 and then describes how and why we'd want to output neither. This detail is essential to how a bus works.
Support me on Patreon: / beneater
See eater.net/bbcp... for more.
I love the way you get right into the meat of the subject without all the music and goofy produced intro.
Me too.
Agreed ! And he’s not begging us to sub every video
@@user-vr9jo2su8p because he doesn't need to, his content in itself is encouraging enough to subscribe to his channel.
this video is also from 2016... it wasn’t common to over edit the videos
@@Carltoffel Agreed!
Finally someone who explained to me why and how tri-state logic is necessary in a bus, and what's up with gates sourcing and sinking current. Eye-opening video. Hats off to you, my good sir.
AMEM to... and a BIG thank you to that!
Couldn't of said it better myself, thank you for stating it Swift Fox and a huge thank you to Ben for the videos!
another way to learn that is to have all your ICs explode!
Incredible to simplify a normally confusing topic, amazing work
"We're getting a 1 and a 0 both output on this same line at the same time"
Ah yes, the poor-man's quantum computer!
Still costs 200$ lol
Literally thought the same thing and solid state too.
I literally have no recollection of this comment, like I don't even remember writing it.
all jokes aside that is an example of superposition, kind of, that's how an unobserved qubit would behave (don't kill me for getting things wrong, I'm not a quantum scientist lol)
I love the fact that knowledgeable people take the time and effort to publish these videos on CZcams. This is such an amazingly valuable resource, thank you very much and keep them coming!
15 year old trying to understand CPU engineering, started off with "How Intel works", found my way here! :p
And I understand **MUCH** of this, this channel is really nice actually.
I would have killed to have a resource like this at 15.
@@in70x
Honestly, we're lucky haha. You didn't ask, but I think CE is not my cup of tea! It's complicated, it's interesting! But it can't count on me. At 18 I've decided to do something else. Most likely IT like work haha.
Honestly forgot since how long I've tried to learn about it. Mmmm
@@hariranormal5584 I hope you didn’t give up.. I am 34 I started in sixth grade and CE is always challenging. I am not at MIT doing research in one of the labs. My point being is this stuff becomes hard for every one, you shouldn’t give up because of it! Now if you aren’t interested in it any longer, then that is understandable but I hope you didn’t stop learning just because things got challenging.
@@hariranormal5584lol I also got obsessed with electronic engineering 3yrs ago and now I'm 18 working as a fullstack dev. Still, this shit rocks dude, you made me curious though, why did you pivot to "IT like work"?
@@augustoerrecarte7076
This stuff is too complex for me. As much as cool it sounds for me, I guess I just don't truly have that intelligence to proceed working here. And yea. You have way more flexibility IMHO if you do dev like work, generic I.T stuff as I said, admins and the likes.
Maybe I was never truly into it, I was just curious as our computers basically work from there, so I wanted to see if I could get how it all works. I only ever got the paper knowledge in it, don't think I can do more :D
Also GG you have work at 18. I'm 19 without, actually gonna do College and stuff eh but yeah. My country's market and stuff is odd really, so sadly I couldn't even work much at all in my fields. Oh well
You are the best teacher I have ever met in my life!
This is the best youtube channel on the planet. Most other people only gloss over how they put something together, not the hows and whys behind it for noobs like myself. I've learned so much watching through these and even helped me get some simple circuits going.
I’m an EE and I like watching these videos. They allow me to think of concepts differently sometimes or if I have to explain those concepts. I now have different ways to explain something that is intuitive to me at this point.
I would have needed someone like you back in 2010 when I started programming uControllers and I couldn't understand much of how programming works. With time, all these notions became clear. Nevertheless, your videos are a very good start for people that really want to understand how a computer works at the deepest level - the transistors. Hail to you!
Just to be clear though, @4:02 he is using 'convention flow'. The actual flow of electrons is the exact opposite direction. The idea Convention flow started before we knew what 'current' really was. Even today it still is easier to understand by using convention flow and by tradition our electronic symbols use it. In convention flow current flows from high to low. The actual electrons flow from low to high voltage. GREAT Video series though. I don't intend to take away at all from it. Best explanation of a bus out there.
Lewis Burmeister You’re correct. It’s important to make that distinction in physics. In my humble opinion, in electronics, there’s no need to introduce that extra source of confusion for students
Excellent! Everybody studying computer science must watch these video series. Thank you so much for your effort and time. Kindly think about to do more related to this topic. You are an extraordinary teacher.Thank you again Ben.
The data on the bus goes one and zero, one and zero, one and zero
The data on the bus goes one and zero, for a full clock cycle
The enable lines on the bus go high and low high and low, high and low
I think you are wrong. The data bus is not some independent device.
LOL! I got it.
68th like
The song of CPU XD
And now I've got that tune stuck in my head. Well played sir, well played.
I'm loving this tutorial. I didn't about this source and sink. The people that took some of their time to build the computer were really smart.
So it's basically TRUE, FALSE and FILE_NOT_FOUND!
Anyway, thank you! It is a beautiful explanation of the concepts and so far very enjoyable ride through computer architecture!
more like true, false, and undefined
or null, if you first got into CS from java like me
This series is amazing. Electronics were always too complicated for me, but you've made it so simple. Thanks for sharing the knowledge.
Thank you sir, good explanation, i've been tried to understand tri state for years, now i understand clearly
That just helped me make sense of a lot of things. These videos and your channel in general have been wonderful in helping me learn digital circuits. I've had a goal for quite some time of making my own computer, and/or CPU and since I took it upon myself to learn electronics, these videos have been one of the most useful tools I've come across for achieving this goal. Bit by bit (no pun intended) I'm getting closer to my original goal. Thanks for taking the time to make these.
I thought the sourcing and sinking example was really good, I had to replay it a few times and write down a few notes to help me focus but I got it. In fact I wasn't even aware the direction of the current so this has been extremely helpful. Thanks for these tutorials and sharing your knowledge you make a huge different!
You are a Legend Good sir. Gold mine of content right here. My professor didn't even bothered to tell me the need for TriStateLogic just told it as if she got from the heavens.
I think it's a bad thing to confuse the enable input with a bus switch. The enable input set to 0 typically disable the chip and turn it to a state to minimize the power consums, where a bus switch just turn the output to Hi-Z.
Ben's videos are the absolute best. I really appreciate the deep level of detail and explanation.
I'm familiar with most of what is in this video but I _finally_ understand what a tri-state gate is and what high impedance means. It was part of my computer organization class but I never understood it. Thanks a lot.
Thank you for your videos. I will try to view as many as I can. I got a lot of catching up to do. I like your calm and pragmatic way of teaching. Something very easy to follow along.
Thanks for your great tutorials.
The schematic at 2:07 makes not much sense though, since for 0 and 1output you have the same circuit, just drawn differently. Both times the voltage source is connected to ground using series resistors. The output "measure point" is at the same location as well, so the result would be the same.
It's a bit confusing, but it actually makes some sense.
But the voltage is important, and not just the direction of the current flow. The first thing to note is that (when signaling using voltage levels) output drivers have much lower resistance than inputs. So whichever rail that the output driver is connected to will decide whether the line is high or low.
The second question is about how you measure the output. We can say that the input measures the output, which means that a low or high output level causes different things to happen at the input. Ultimately, what is important is what happens inside the input. So if the input contains one transistor that will sink current to ground when the input voltage is high, and another one that will source current from 5 V when the input is low, the important thing is what happens when those respective transistors do that. So the input could be seen to measure the current that goes through specific components inside to decide how it should react.
I know what is tri-state buffer but didn't why use. this time i totally understand. thank you.
Excellent eye opener for me and enough detail but not too much. I should be back for more!
These videos are awesome. I just created a patreon account to support you
Fantastic sir. Your explanations are excellent. Your enthusiasm and expertise is infective, I want to start building, as per your example.
Thanks for the information.
I don't know, how I stumbled upon these videos but it has been a great ride so far. The thing that made me comment is this:
I used to look into overclocking my CPU a bit and there is a term called "load line calibration" that comes up sometimes. In the end you used the word "load line". Does that have anything to do with it or is it just a coincidence..?
Damn this is really good. I understand it. Semiconductors shut off different modules on the bus by incompleting or disconnecting the output circuit. By stopping the flow past the NP Buffer zone, but they can still accept and read data to the N zone I guess.
i cannot begin to tell you how helpful your videos are, thank you!
If your computer runs out of control bits inside microcode, you could use decoder for all the bus enable signals, because they should be activated one at a time to avoid conflict. So, instead of A register out, sum out, PC out, instruction register out, ram out (5 bits) you could use 3 bits:
000 - A reg out
001 - B reg out
010 - ALU out
011 - PC out
100 - RAM out
101 - instruction reg. out
and it allows now to output B as well, and another 2 devices in perspective. Some input would be great :)
That output circuit with those two transistor are called totem pole output.
So grateful for these videos, very well explained, very well executed, right to the topic and so on. Thank you!
I’ve just had to learn this stuff because an Arduino shield didn’t have a buffer and I was trying to use SPI with two shields and had to figure out how to put a buffer chip in the middle. Thank you.
Ben Eater is the man!
impressive series, really made my week. thank you for sharing your knowledge
How can you make such complicated things so clear!!!
So this great explanation made me realize there can only be two devices talking to each other each clock cycle,.. I can see the registers of my arduino-like chip with a debugger I believe, I now wanna go check if they are indeed only changing one at a time!
That is true if you only have one bus. But you can have several busses on the same chip, and lots of smaller dedicated connections between different parts. Then lots of change can change in each clock cycle, and it pretty much always does, but it might not always be obvious to see that from the outside.
Thank you! Nobody ever explained the point of tri-state to me before
Learned so much from all these videos. Thank you for making these!
Really good video! Exactly what I wondered about, explained in a very good way, speeding up my learning curve. Thanks! Great content overall, very inspiring.
Everybody understands your explanations..if they don't they should head for a checkup... Thank you!
I can't thank you enough for this
TKQ. & thumps up for all the lectures till now ( bus and tri state+' enable concept)
Thanks from Texas.
Tri state logic prevents two outputs at the same time.
Source current = 1 current flows out
Sink current = 0 current flows in to ground
Disconnect the output is the goal
On the next clock pulse, if the load is high, the data is read from the bus
Excellent video
Loving this series and your other videos!
This is really fascinating, thank you so much for making these! One clueless question: wouldn't putting diodes between the output of one module and the bus isolate it from every other input?
+fcouperin nevermind, it would still send the output even if we didn't want it to ; )
Work is done by current. Current flow is due to the movement of electrons (6.24 × 10^18 electrons to make up 1 amp of current). What you speak of here (and a few others) is 'hole flow'. Every teacher I had that taught electronics in college, holes are full of air - not work. Current flow is then made up of electrons, not holes. Therefore, current flows negative to positive.
150 years before the discovery of the electron it was thought that current flowed from positive to negative, however now they know the truth but the mistake is still taught.
Broo i was starting to lose hope for the english electronic scene but this 7 yr old video was here this whole time 😂
Why all those videos don’t have few dozens millions views!?
One of best explanations. Thanks !
Great video
Great explanation!
What if we just used a simple transistor where the base would be the enable wire. Would that work ?
That transistor getting in cutoff mode will also cut the whole bus into two parts: the upper part won't be able to "speak" to the lower part through this bus because one (intermediate) object has just cut the bus.
you are so nice and understand able
Why do you need the diode in between the transistors? Current won’t flow back anyway and there is another 0,6V drop?
It's legacy from old TTL circuits, depends on the circuitry that was used to drive those two output transistors in the first place. You needed a big enough voltage drop for the other path, or it could turn on even when it shouldn't.
Excellent !!!
Excellent
Excellent@
Amazing thank you
Hey Ben, love your videos! I got a question - why cant we just use AND-Gates for this purpose? We could feed the register data in the x1 pin and the enable to the x2 pin. I dont really get the difference between these.
7:03: "And we can have that enable line low for all but one of these..."
I believe that explanation is inconsistent with the 74LS245 datasheet you just showed @ 6:21: There the enable line is inverted, i.e. low for enabled, high for disabled. So you'd want to have that enable line high for all but one of these.
I love this. Maybe I will be a simulator online so anyone could build this
Regarding the 3-state output, how would one instantiate this using transistors?
You can do it like at 1:03, if all you have is NPN transistors. The diode shouldn't really be necessary, it's there for reasons that have to do with things that are further behind the output transistors in a TTL gate.
You don't absolutely need the series resistor for the pull up either, but of course it's always good to consider how much power you will be drawing also in the case when (briefly) something is trying to pull the output high at the same time as something is trying to pull the output low.
On the other hand, for bipolar transistors, I would consider a series resistor for the base to avoid it drawing too much power. Should be ok for the upper NPN transistor, since it's in a common emitter configuration, so as long as it enables to pull the output one diode drop below the base, it will lower its own base-emitter voltage to keep the base current small.
But the upper NPN transistor (common emitter configuration) is not great because the output voltage will be one diode drop below the base voltage. If you have a PNP transistor, you can use that for the pullup instead, in a mirror configuration to the pulldown. One nice thing about that is that a high base voltage will activate the NPN and pull the output low, and a low voltage will activate the PNP and pull the output high, so you can drive the bases with the same signal, except when you want to the high impedance state that is.
You can do the same thing with MOS transistors, one NMOS for pulldown and one PMOS for pullup. This is how it's done in CMOS logic. Then you don't need any series resistors for the gates, because MOS transistors don't draw static current through the gate (except some tunneling current for really tiny ones, like in modern chips...).
I've had conflicts on the bus ... 😏
Thanks that made my day
Oh, THAT'S how this works!
Me: 4:30 Oh boy he is about to go into op-amps.
Oh. Nevermind....
great explanation thanks!
Really awesome !
i have a question.. is this bus directional ?, does data flow in both directions , and still turn off the respected line so there isn't a conflict?
Data flows from whatever thing is enabled to drive the bus, to everything that is reading from it. So the direction depends on the control signals. That's what makes a bus so versatile! But you have to make sure never to enable two drivers at the same time.
Nice videos. Thank you
This might be a stupid question, but why the additional sinking state (switch flipped so it connect to ground)? Why not just either 5v, which would be 1, but if enable is off, the other part is not even connected to the circuit, so a 0.
This part is confusing me…
Now I'm really curious about how you'd construct a three state circuit. How would you cause it to be neither a sink nor a source?
amante pensanta connect it to nothing.
But how would one do that, electronically? Would e.g. the emitter of a transistor suffice?
I would say so, an unenabled transistor should block either a source or a ground.
Look at the circuit at 1:03. If you don't supply current to the bases of either of the transistors, it won't drive the output either high or low. Since you can turn on the source and the sink separately, you can choose to turn on neither. It's just that regular outputs are wired to turn on either the sink or the source.
Nevermind. I got answers to my questions from the video.
If two short-circuited outputs of two elements differ, wont the elements damage themselves from resulting current? I assume, the bus has low resistance.
Or are they protected from that? I assume (from how you draw them), the transistors are internally-disconnected MOSFETs, so I wonder how the current-protection works inside the elements.
You need to either make sure that it doesn't happen, or that the current doesn't become so high as to damage the components when it does. For the latter, some series resistors might be useful (as the output stage at 1:03 has for the pullup; it's enough that either pullup or pulldowns have them).
A register who operates existentially.
Could someone explain what the diode is for in the tri-state part of the logic. From what I can see, if you have a 'high signal and enabled' then the top transistor would be on, so current will flow from +v, through a resistor, through the transistor, and final out the diode onto the bus. Is there some sort of issue with a transistor having a high voltage on both the collector and emitter?
Sorry for necroposting: came up to these video just couple of days ago. This diode is legacy from first TTL circuits where they had Darlington transistor pair in place. The upper part of output circuit is emitter follower: voltage at emitter 'tries' to follow the voltage at base, but nearly 0.6 volts lower. So if we have 5 volts supply (standart for TTL), high level output from Darlington would be nearly 1.4 volts lower, that is 3.6 volts.
After advances in technology, this transistor pair became redundant: one transistor alone provided enough amplification, but to make all these chips compatible, they decided to leave diode in place, so output is still 3.6 volts.
Though there may be more to it than just compatibility: one stage before output is called 'split phase' stage: it makes sure lower transistor is open while upper transistors are fully closed, and vice versa. If we remove that diode, we can come up to situation (probably when chip is hot enough) where lower transistor is open, but upper transistor is also partly open, because that split phase stage cannot provide low enough voltage at base. And that means there is useless current going just from power supply to ground through both transistors. All it does is heats them up and drain power supply. This diode helps to avoid this situation.
Hi great series. I have a question though I have the 74LS175N D F/F instead of the 74LS173 which has the logic gate inside the package, so im assume I link the logic gates to the 74LS175N to build the register, id like to know if im correct in this assumption or am I wrong?
super super video good explanation
I am confused about your discussion around the 1:40 mark. The gates sourcing current for 1 makes plenty of sense; but I don't understand how it could possibly change into a state in which it's sinking. That seems to imply to me that the output is connected to both + and gnd; which couldn't be true. Unless your sinking state is really just no current?
jmile69 it sinks current from any current source attached to its output, which isn't pictured. If the output isn't connected it will show near zero volts. If it is connected in a complete circuit, a small amount of current will flow.
The two transistors are what do the trick. Turn one on, and the output will act as a current source (logical 1) while if the other transistor is turned on instead, it will act as a current sink (logical 0). The trick is to design the circuit so that you can never turn both transistors on at the same time since that really would cause a short circuit.
@@matthewkriebel7342 That's why the simplified gate circuit at around 2:07 makes no sense. The output is 0, eventhough it is connected to Vcc.
Aron Highgrove ah, are you looking at that 4th (bottom right) AND gate? That is a little bit misleading. Just think of that pull-up resistor as being really high value. As current approaches 0, voltage will drift up, yes, but as long as the pull down in the left gate is 1/10th or so the value, current flows left-ways (conventional flow theory), and the line is low. Read up on totem-pole drivers and high impedance inputs. Maybe someone else’s explanation will click with you.
How would you do that in 4:00 with manufactured logic gates in ICs like the CMOS 4011 or TTL 7400?
I know that they make tri-state gates like you mentioned in 5:45. But I do want to know if it is possible to do it without opening the IC and connecting wires to the die with the help of a electron microscope - an 'impossible' task in most scenarios, lol.
You can't do tristate with normal logic gates, because their outputs are always wired to drive the output either high or low.
You can do it with discrete transistors, you can have one to pull the output high when you activate it, and one to pull it low, and then you can have regular logic to choose which of them to activate, or to activate neither.
An alternative to a bus if you don't have any tristate outputs is to use a multiplexer instead, which takes a signal from each source that could drive the "bus", and a selector signal to choose which one to use. Then there is only one driver for the bus, and you don't need tristates. But then you have to draw a lot of dedicated wires to the same place.
Conversely, one way to implement a multiplexer is to have a tristate driver for each input and a demultiplexer that chooses which of them is allowed to drive the output.
is the tri-state gate doing the same thing like a mux gate ( with an ouput =0 ) does ?
That whole current sinking and sourcing kinda makes my brain overheat. I'll possibly need to re-watch that part 10 more times to wrap my head around it.
I do get the general issue, but I also want to understand that transistors part, which currently seems to be beyond me.
This may be a bad question but couldn't you just put a diode to ensure that no current can be sunk into the output?
Thanks !
Ben, are the signals gonna be loaded to the register/enabled back to the bus only in one direction?
Or you've just drawn it this way for simplicity?
I mean if the direction is opposite than Enable should be able to work as Load and vice versa, is that true or I've missed something? THANKS IN ADVANCE!
"If you didn't understand what I've just said" - before this phrase I thought I'm the only one who didn't get anything from the explanation)))
So basically a bus is like a highway exit/entrance where to get on or off, other traffic does not have to brake, where as a junction, the traffic sometimes has to brake for a car to get on or off.
outputting A and C at the same time would be a very quick way to "compute" the bitwise-or of A and C... :-D
I thought so, too, at first, but the more he explained, the more I doubted that. If A has a 1 in a spot and B has a 0, and they're both outputting, I think the current from A would just sink into the pin from B and you wouldn't actually get the right voltage out. Maybe? I don't know, I'm more of a software guy :D
@@IceMetalPunk yeah, after thinking about it more, I also thought that it wouldn't work because he connects a drain to bus-lines whose bits are zero
Some busses are constructed this way, it's called wired-and. Then you typically have a weak pullup on every line. If you would output a one, you don't drive the bus at all, because the pullup will take care of it for you. But if you want to output a zero, you enable a strong pulldown, with much lower resistance than the weak pullup.
There are systems that use this, but there are some disadvantages, like static current consumption when the pulldown is enabled, and slow rise time because of the weak pullup.
At 1:13, the hidden logic has to be sure that only ONE of the two transistors (that we see) is turned on, right? So that enforces the idea to have Q and Not_Q as two outputs in many sub-diagrams !?
nothing actually, you have to design your CPU right, otherwise things go bang
Don't most modern chips use mosfets instead of bipolar junction transistors?
you can say that the pin is "floating" ie not connected to source or ground
The only thing I don't understand is at 3:46-3:54 "you really want these to be disconnected".
Why?
The current would just have another way to flow to ground, but wouldn't mess up the logic.
What could be the answer is:
- because then the current is divided on the bus to the number of places where it sinks? so it could happen that not enough current is flowing to the register we actually want to feed?
- unnecessary power usage?
Please let me know if you know the answer:)
If A is outputing a 1 ie 5v but C is sinking to ground, then if B is reading, B will read 0 because the 5v has been sunk to ground. This is how I understand it?
That could make sense, thanks!
Because the current wants to get to the ground on the smaller resistance. Which incase of B is basically just the wire's resistance. While on A, there is a circuit?🤔could be:)
it's not my first time that I'm watching this video. Every time i watch this video, i try to find the explanation how does a circuit knows that it's sourcing a current or wether it is sinking the current, So here's the possible solution.
1. when both enable pin and load pin are high (for to different components) and source bit is 1 and load bit is also 1 then since it has 0 potential difference then load pin will be 1
2. when both pins are 0 ,still potential difference is 0 so load pin is 0
3.enable pin 1 and load pin 0,then enable pin is sourcing current while load pin is sinking current so output is 1
4. vice versa of 3rd point
please correct me if I'm wrong, (I really need to know that my thinking process is right)
First of all, it is important whether the voltage is low or high. The output driver will have a much lower resistance than the input, so it will control the voltage level.
Second, the question is which component inside the input is sourcing/sinking current? An input would likely have one transistor that sinks current when the input is high, and another that sources it when it is low. Those transistors will have different effects when turned on; that's how the input knows.
Any reason why it won't play past 3:37?
he touched the halt wire
Because CZcams shat its pants. Try re-loading the page. Another trick I've found sometimes works is clicking on a point just after the premature end point. You'll miss a second or two but the rest will play.
Hi Ben,
What are your thoughts on reverse polarity. In other words current , i.e. electrons, move from a negative polarity to a positive polarity?
I'm not Ben but I'm both mathematician and telecom engineer. It always was a hassle in U when on mathematics when doing vector and tensor thingies with potentials one must always remember that when you do them on engineering the signs reverse. That is something you just have to learn to live with.
Why doesn't the "disconnected" state just represent 0? What advantage does "sink" as 0 have as opposed to "disconnected" as zero?
ah nvm, if the 0 was just "disconnected" it wouldn't affect the current of the bus, I get it now
You say that two modules shouldn't ever be enabled at the same time, and that makes perfect sense. But what if you purposefully did so? Could that be a janky way of having a bitwise OR operation?
My bad, I didn't watch trough the whole video. Having two enabled modules would AND them together! Could that be used as an instruction?
Nope. It wouldn't actually AND them; any line in the buffer where the signals were conflicting would be floating and could read as a zero or a one pretty much unpredictably.