How to Create First Xilinx FPGA Project in Vivado? | FPGA Programming | Verilog Tutorials | Nexys 4

[@lucianomartinez2927]

Gracias compañero!! mil gracias por el video tan detallado y con tanta paciencia!!

[@raccoonduck5406]

This tutorial is fantastic, thank you !!

[@ElectroDeCODE]

Thank you

[@MuhammadAhmad-lr4yv]

Highly explained! Going for it.

[@ElectroDeCODE]

Thanks Indeed ❤️

[@abdullahsaud6412]

Impatiently waiting for it
Thanks Sir

[@asgharismail7206]

Very Well Explained Thankyou

[@ElectroDeCODE]

Thanks

[@lucastellez7928]

Excellent!

[@ElectroDeCODE]

Thanks

[@tejasg7665]

Helpful 👏👏

[@brajkishorrajput9238]

designing of FIR Filter By Vivado software

[@mannusheetal3161]

please make some more videos on FPGA
please make a video on random number function generator with FPGA
highly requested

[@susantasamanta1349]

if i have input more than 16 bits then how to assign them a switch?

[@vincentjr8013]

How to test big design on fpga , which has clock and 64 bit input and outputs?

[@AdvanceZYNQseriesFPGAprojects]

czcams.com/channels/qDQ4s5XamUYA8lJ_cz41jQ.html
Here u will get advanced projects on zynq fpga

[@f_d557]

Nicely explained! Where can I get the reference document?

[@anilkadiyala]

Hi, can we use this board directly by putting on the table or any ESD protection setup is required ..?

[@sumairaziz9219]

we can use it directly if you are using just a basic demo program. If you are loading heavy design, then you must use proper protection setup.

[@cindyzhang4295]

Can you give out a video on how to add timing constraints in a multiple clock domain design?

[@muhammedfayas5907]

Hello Sir, can u please tell me how to access the BRAM in FPGA board, and how to store text file in the BRAM.

[@ElectroDeCODE]

This is how it could be done:
module bram_example (
input wire clk,
input wire we,
input wire [addr_width-1:0] addr,
input wire [data_width-1:0] din,
output wire [data_width-1:0] dout
);
parameter addr_width = 10;
parameter data_width = 8;
// BRAM instantiation
reg [data_width-1:0] bram [(2**addr_width)-1:0];
reg [data_width-1:0] dout_reg;
always @(posedge clk) begin
if (we) begin
bram[addr]

[@user-sb8yh1gr2j]

Everything is OK, but why I have an error about"program_hw_devices" failed due to earlier errors after running "program device..."?

[@ElectroDeCODE]

I think there is some error in implementation or synthesis phase. Please check it carefully.

[@user-sb8yh1gr2j]

@@ElectroDeCODE ok, I want to make sure other thing. If my implementation and synthesis is all completed(no error) before I had that problemq, then there still might be some problem right?

[@ElectroDeCODE]

You can check your hardware kit, connecting cable and hardware drivers of your computers.
You may reinstall vivado software and it's drivers on some other computer and try again with it.

[@LL-ue3ek]

Where can we purchase evaluation modules like this, they all seem to be out of stock.

[@ElectroDeCODE]

You can buy similar boards from digilent website. Similar board available now a days is Artix A7.

[@lokesh8282]

Sir ,what if bitstream error comes??

[@sumairaziz9219]

It means that your selection of device is not correct. You may need to check the pin mapping of input and output as well.

[@premsinghbardaval2724]

If u have code for 7 segment 4 digit display, please send me sir

[@MohdSalman-yj9eu]

Sir, can you share LDPC code.

[@engrx535]

👍👍👍

[@ElectroDeCODE]

Thanks

[@swapnaldeshpande8823]

How much does this kit cost?

[@engrx535]

its costs around 250$. Its new version Nexys A7 is available now a days.

[@anilkadiyala]

25k INR and 10k for IGST, 2K for customs

[@brajkishorrajput9238]

any contact details

[@user-zq8uo6xn6k]

Excuse me, I had clicked the "auto connect", but it only appeared localhost(0). Could somebody tell me what happen?🥲(I've tried re-installed cable-driver, and it is no use)

[@user-zq8uo6xn6k]

PS:The problem was about 14:55.

[@ElectroDeCODE]

You can may check the USB cable, if not then then you have to check your FPGA board.
If that board is working on some other computer with the same cable then you need to do a clean reinstall of your vivado software.

[@user-zq8uo6xn6k]

@@ElectroDeCODE ok,thank you, it's really working on other computer, so I am going to reinstall my vivado software.

[@yallampallisubramanyam9394]

@@user-zq8uo6xn6k After reinstalling now vivado software working fine in your laptop?

[@user-zq8uo6xn6k]

@@yallampallisubramanyam9394 No, it's still has the same problem. But it's OK with the FPGA board on other computer.