IBIS vs SPICE Model for Signal Integrity Analysis

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  • čas přidán 5. 09. 2024
  • Hi Folks,
    This video explains about the Category of IC modelling for Signal Integrity analysis for high speed board analysis
    Feel free to drop us a comment for any query or suggestions!!
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Komentáře • 8

  • @ehsanbahrani8936
    @ehsanbahrani8936 Před dnem +1

    Thanks a lot

  • @EngineerAnandu
    @EngineerAnandu Před 6 měsíci +2

    Sir pls upld more vids.

  • @tasleemsultana7120
    @tasleemsultana7120 Před 3 měsíci

    Please upload the video about how to generate IBIS model and it's flow

  • @maheshpalika8985
    @maheshpalika8985 Před 7 měsíci +2

    What is c-comp value and their importance in ibis?

    • @board_design_simulation
      @board_design_simulation  Před 7 měsíci

      Hi Mahesh,
      C_comp represents the Capacitance value in the buffer and is measured with min, max and Typical value.
      This value is usually the capacitance of the transistor and die.
      Please don’t confuse this capacitance value with package capacitance.

  • @sivaDhanam4551
    @sivaDhanam4551 Před 7 měsíci

    Thank you so much for wonderful overview. What is the difference between R/C/L_pkg, R/C/L_pin?
    Usually a component in IBIS file has multiple pins. Each pin has its own R/L/C parasitics which are mentioned per pin using R/L/C_pin. Then what is the real significance of R/C/L_pkg parameters?

    • @board_design_simulation
      @board_design_simulation  Před měsícem

      Hi,
      You can always connect with me on TopMate:
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