Simulating an analog phase locked loop

In this introductory video tutorial I simulate a phase locked loop (PLL) using NI AWR Visual System Simulator (VSS). The goal of these "virtual experiments" on PLLs is to explore some basic design trade-offs and properties of PLLs. I created this video to help people learn how how PLLs operate, and hope that this video will help compliment the mathematical explanation of PLLs with dynamic simulations.

[@EduardoDoradorDech]

Great Video!

[@rfengr00]

Nice video. Increasing the loop filter BW increases the reference spur, not necessarily the phase noise.

[@jameslawrence6068]

How does one setup the GUI like yours?

[@kevinshah5031]

this was very helpful for me understanding the basic concepts. If possible, I would like to know if the optimum gains of the PI controller for the loop filter can be calculated for any given frequency, bandwidth and sampling frequency. I would like to know how to estimate all these gains including NCO gain, if it cannot be perfectly calculated. This will help me very much in my project on PLL. Thank you very much for the video.

[@poojanpatel7225]

Plz help me Kevin in pll because this is also my project