How TSMC Keeps Getting Better
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- čas přidán 24. 06. 2024
- In 2021, TSMC fabbed about 12 to 13 million 300-millimeter wafers. Assuming each die is about 100 square millimeters large, that is about 8 billion chips. Eight billion.
Semiconductor manufacturing is the most sophisticated, unforgiving high volume production technology that has ever been done successfully. You need a lot of practice. The more chips that TSMC makes, the better it gets at it.
In this video, I want to talk about how a fab like TSMC improves their operations. How they think about yield, speed up throughput, and in general get better at wafer fabrication.
Links:
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There's an idiot called "Pinned by Asianometry" posting spam in here. Ignore it.
This is an ever increasing problem in many channels. Hello, Google?
Well that would be you.
I don't know about that chief, it looked suspiciously like you🤔
Yea the moment I saw that I reported that piece of crap.
Yup, I posted a comment, and there you have it, I got spammed by the account -- and to others, please read carefully, the name of the account is "pinned by Asianometry", not simply "Asianometry", so NO, it's not Asianometry.
This discussion of error rates & yields makes me think of DNA transcription. Our cells might only make 1 error per 100,000 base pairs when transcribing DNA, but the genome is complex enough that we still need a massive error-handling infrastructure to keep all those errors from killing us.
Great comparison
And yet a 100% perfect DNA transcription process would disallow the possibility of beneficial genetic mutations, so the error-handling systems have evolved to allow a tiny trickle of errors, I think. A very delicate balancing act.
Ayup.
@@robertlee5456 nah we're done evolving, did it for millions of years, time to turn off the telomeres shortening function.
Is DNA transcription process a chemical process?
As someone with little to no idea on how chips are made (it always seemed like magic to me) these videos have been quite informative, even for someone like me. I love them, keep up the good work!
U can watch Linus tech tips tour of Intel's Israel FAB, they show the robots and the process there
And now that we've watched hours and hours of these videos?
Now it's confirmed magic.
This is just magic, people, they are meddling wizards, not other explanation fits
The more I learn about chip manufacturing the more I am impressed about what humans can manufacture. It's incredible that such industry with that much complexity can exist and be so productive. It is fascinating
Was surprised that a lot was talked about on yield management without mentioning KLA, the toolmaker whose whole business is built on defect detection. Otherwise fantastic overview on what keeps TSMC at the top of the game.
yep -- worked for KLA for decade+... and can very confidently say its one of the companies that nobody has like heard ever (general public), although they have the lion's share in various sections of metrology and yield management. Sigh.
I hated the KLA tools.
Sucked being a tech and having to run down defect issues.
@@AmrishKelkar how to get a job in the semiconductor industry, like which engineering degree is required
@@johnjacobjinglehimerschmid3555 I think each and every tool inside a fab is an extremely complex monster. Very tough to troubleshoot. I agree - tool going down sucks - - but there really is no way around it. Was your experience with other tool vendors the same? (keeping tool complexity ~same level)
@@orkkojit Mechanical, electrical, electronics Engg degrees are highly sought after. Material science. I would suggest master's+. CS too, but you're not going to get paid like pure sw companies. Degrees in physics and maths can also get you in.
I studied this in a master degree 10 years ago. The technology evolves so quickly that the knowledge then acquired is now obsolete. Thanks to your channel I can stayed up to date. Also, we don’t really need to go to university to learn this anymore. Time for a revolution in the expensive and obsolete education system …
I've watched several of your vids that talks about chip making, but this one, it really opened my eyes to how these processes are 10000x harder than I have ever imagined
I really enjoy your in depth analysis. Thank you for this content
TSMC partnered with Apple to create the UltraFusion chiplet connection. TSMC also partnered with AMD to create 3D V-cache. With the M1 Ultra and 5800X3D selling in volume, TSMC is getting massive production data for the future.
and atomera
Tri Nguyen
EUV, that was a Japanese guy, ASML patented it, TSMC is producing them .
I am even more amazed and impressed than I was before I watched your vid. Thank you for making.
Man the amount of knowledge you have over the broad process is astronomical.
Fascinating, it's hard to imagine how much research and reading you had to go through to distill all the knowledge you've absorbed for the common person to understand.
Great vlog. You managed to tell us a lot more about TSMC. They are truly amazing.
This is great! I'm an ex Intel guy and can hardily agree with your points. One minor point to emphasize is that it takes a career (like 20 years) to recognize what the problems are and what the likely solution is. Its the ability to spot likely causes and apply the right method of investigation and solution
Wow you make consistently great content frequently. Awesome channel
we'll call that : work, insight and talent ? :-D
Great video, looking forward to more of these!
Brilliant video. Very clear and very useful. Thanks for it.
This is insane and freaking bananas what humans can do. I'm watching the video with my mouth open!!! Subscribed to your channel, my dude!
Great stuff asianometry. You're videos aren't just among the best on tech and political ecnoomy, they are among the best of any youtube channel of any type. thanks.
Great video, as always. I was surprised by your pronunciation of 'stochastic'.
I work in a 150mm SIC Fab, for a relatively small company. Based on the fabs youre talking about in this video, its like I work in the stone age.
Nothing better on a Monday morning waking up to a new TSMC video!
My university internship was in a wafer fab plant. Yet I did not realise wafer fab is so complex and sound really fun. I was even invited to work in the fab but I ended up as a network engineer. Now I feel like I missed doing something I may be quite passionate about.
There was an interesting piece in this weeks Economist about the Taiwan chip industry. They highlighted the number of engineers being lured to China and suggested they are seen as traitors in Taiwan. Any thoughts of doing a video on this topic?
I heard in the 1990s Japanese chip engineers moonlighted for up and coming Korean chip fab companies, which wasn't too hard to do considering it's only a 2.5 hour flight between the two countries. Since then, Japanese chip companies have never recovered their position, at least in sectors such as memory.
But if ASML (or whom ever is makes the required machines) is restricted from importing to China then not sure how useful it will be. Have not read the article but have heard of this issue before for years.
@@johnl.7754 not to mention Japan also play a role in creating device that is in the process to prepare these chips fab so I dont think they would do well.
Even so.. Taiwan still relies on Japan and US for the designs.
Huawei has been beaten by the US. So chinese technology is just a joke!
I love your videos I can feel my brain growing when I’m watching them lol.
This was great! Thanks
Last I heard TSMC is introducing N3E which is "only" a 60% density shrink as opposed to the standard 70%, but it's already yield ramping right. This shouldn't be a big issue since N5 was already a bigger leap over N7 than normal. 84% in the best cases actually. So from N7 to N3, on average, follows the 70% density shrink every two years.
What advantages does density bring beyond purely more semiconductors per unit of area? Gate capacity (power usage), propagation delay? Will some of these start scaling worse with density or have they started already? What about leakage current?
Because i have a feeling that a lot of the time, the device size is hardly the goal, as the packaging takes up too much room anyway for it to matter, and we're well past bottom price per FET; and for large and powerful chips, power density is becoming critical anyway, like if a chip that takes like half a kilowatt, ridiculous, how do you even cool that without having it turn into a Pringle?
@@SianaGearz Power usage, specifically FET leakage current and RDS(on) is a huge part of a node improvement. This is the key to usable density nowadays as thermal density became critical.
@@SianaGearz The advantage of smaller transistors is faster switching time (higher frequency chips) and faster signalling between each transistor (signals propagate at the speed of light). The first disadvantage is greater leakage (wasted power), but this is partly offset by the better voltage/frequency curve. That is to say: if we only "harvest" *some* of the frequency gain in exchange for lower operating voltage it's still a net gain. The power density problem is not inherent to node shrinks. It's inherent to competition. Laptop chips run at 15W and get like 80% the performance of their 65W desktop cousins. We still make chips about the same size all the time, so the cooling area remains much the same. We just cram more transistors (which each use less power) into the same size package for a net performance gain.
@@andersjjensen Frequency scaling is not really happening anymore. We had 5GHz chips ten years ago. Electrical signals also do not travel at the speed of light.
Nowadays it's mostly more transistors and a bit more efficiency per transistor.
@@_TeXoN_ Electromagnetic signals travel at the speed of light in the medium they travel in. Just like light travels through air.. at the speed of light in air. We generally don't bother to distinguish between "the speed of light in a perfect vacuum", which is what think of when saying "the speed of light", and "the speed of light in this particular alloy" because in microprocessors (and other high quality electronics) it is at 95-99% the speed of light in a vacuum.
Frequency scaling still happens despite you not seeing much of it in modern processors. This is because it is difficult to retain good IPC (Instructions Per Clock) at higher frequencies on the rather complex instruction sets of PCs.
Every time TSMC markets a new node you'll see them state something like "20% more speed at ISO power or 40% power reduction at ISO speed" (those happen to be the numbers for N5 over N7). The chip designer can then mix and match between those two extremes to suit their needs the best. ASICs (that is, logic chips that don't interpret programs because they ARE "the program") see perfectly good frequency scaling if designed right.
Chip making is fascinating, all the small things we enjoy everyday but have no idea how they are made
TSMC employs wizards, simple as that. Since Samsung and Intel try to make progress without utilizing the arcane, they're lagging behind. jkjk, but it seems like TSMC has a fundamentally better understanding about the issues that may pop up when doing a node shrink, and how to solve them, aswell as far superior software and design guidelines.
i met some of the TSMC engineers a little while back. they are far far ahead... some of the most clued up i've ever met. back in the day i was heavily into CPU architecture & design.
@Asianometry Stochastic is pronounced "Stockastic" ;)
Its originally a greek word. Greek imports with ch are always pronounced like that. The ch is the replacement for the greek letter "chi", in which ch is also pronounced like k.
edit: "...which i will refer to as foops". thats adorable and made me smile, thanks.
"mom found the foop drawer"
My father pronounced it that way so I will honor his teachings.
This made me think how different groups of people can use the same concepts, but have different pronunciations or even words.
Easy example: in Brazilian primary education, we learn that the formula for finding the roots of a quadratic equation is called "Bhaskara's formula". Bhaskara is an ancient Indian mathematician, and it seemed fitting, so I never questioned it.
Turns out this is wrong information that somehow got into all Brazilian university level math textbooks. So every Brazilian child was being taught the quadratic equation had this name when no such thing existed.
I wonder if it is possible for chip making to become a lost art in the future, maybe because of conflict in the region? There's so much know-how, experience and IP involved, not just capital equipment and raw materials. Technology can become "lost." The rockets and other equipment used in the Apollo mission cannot be duplicated anymore, even though the blueprints are still around. Or take a Stradivarius, which no one today has been able to duplicate. Or the secret of Damascus steel, which has never been exactly duplicated by modern sword smiths.
we will scour the cosmos looking for STC's just like in warhammer
I'm sure that's one of the reasons for the US wanting TSMC fabs on American soil... So if China should one day lose its mind and destroy TSMC on Taiwan, not all intellectual property will be lost. Although TSMC makes chips for the entire world, the US is by far the country which benefits most by advanced chips, and chips in quantity and if TSMC production is destroyed it can be argued that perhaps the US would suffer the loss more than any other country.
The scale of the industry makes it unlikely. All the examples of "lost technology" you gave were done by (relatively) small groups of people. There's hundreds of thousands if not millions of people involved in the wafer fabrication fabs and suppliers.
@@tonysu8860 that was extremely well thought out and eloquently put, bravo!👏
IT'S MODERN DAY ALCHEMY! Just accept that as we all wait digital devices to ticket our fancy!
Looking forward to a video about the rumors of TSMC potentially opening fabs in Singapore and the implications
Very good video - thank you.
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I love these videos. Fascinating, enlightening, educational - and at times hilarious. Why does "FOUP" sound so funny?! I don't know, but I had to stop the video while I giggled.
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fascinating video, great job
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Very nice.
Is there a place (patrion page maybe?) where you are listing which textbooks you are using?
Your time to yield graphic should show that the kpi is in units of time (arrow should be in the time axis). Also interesting to mention is that typically yield learning rate is proportional to yield. So yield ==0 makes yield learning difficult
Another useful presentation to tell us the human mind and resolve when harnessed so intelligently creates so much value. The measurements are awesome.
@6:53 shouldnt be the TIME to yield on the x axis? (u called the Y-axis(yield) gain exactly that, yield gain) the time to yield for that specific yield gain should be where the horizontal iminative lines for your yield gain ends hit the curve
treating the process of creating architected chips as process architecture to be optimized is some awesome meta-application and applied efficiency
Simply great video..
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Please talk more about Stochastic Computational Lithography software. Is there a way to validate design integrity at each step? How is the lithography mask itself damaged? Is there any chance of using meta-materials to create sub-EUV lenses?
I watch each of these in the context of the worldwide chip supply chain push that seeks to replicate what TSMC does in brand new fabs. I can imagine the learning curve, never mind the yield curve, might never catch up.
How will the new US based FABs be integrated into their production scheme? Will they mainly fill NAFTA and South American orders? Or will they just be used for more volume based orders?
Interesting video as always. Keep up the good work. Long time fan
I'm sure the whole point of providing the subsidies and investment to fund fabs in the US won't come without strings. From the USA point of view, it'd ensure availability of some decent chips although apparently not the best that TSMC manufactures if China one day insanely destroys all of Taiwan including all TSMC fabs on the island. The point is that even if nothing particularly advanced is made in US fabs, it'll still be better than if all TSMC's production is completely destroyed. TSMC benefits because Taiwan's fabs are still so valuable that the world would put immense pressure on China not to destroy Taiwan while still doing a large amount of business on US soil safe from any threats. And, as the video describes TSMC practices are far advanced compared to everyone else today so everyone will benefit from TSMC on US soil.
it's not a big one. Maybe mainly for Department of Defense - to make US govt less stressed.
@@tonysu8860 the world is too cowardly to stand up to Chinese aggression in Taiwan. Sucks but true.
Subscribed!
In my mind Tina Turner's iconic song 'The Best' was playing during the intro.
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Hi, thanks for the great effort here. Can you please provide me with a full source about the Motorola faulty emitter pipe incident?
hi, I could not help myself with it.. 4:56 the ch in stochastic is as in chemistry
thanks for the video, it was very interesting.
T̼h̼a̼n̼k̼s̼~̼~̼f̼o̼r̼ ̼w̼a̼t̼c̼h̼i̼n̼g̼!̼!̼!̼
̼T̼e̼x̼t̼ ̼o̼n̼ ̼W̼h̼a̼t̼s̼A̼p̼p̼✞̼︎̼✙̼①④④③⑤③⓪⑦⑨⑦⑨🚀🚀🚀📉▶️..
Sorry to correct you: the CH in "stochastic" is not pronounced like in "choice" -- it's a Greek origin word, like "chorus", or "chaos", and in English it's pronounced like an unvoiced hard "K" sound, exactly like in "chorus", or "chaos".
Other than that very minor thing, fantastic video. Thank you very much!
Liked this video (I actually understood some of it!) ☺☺☺
I went from understanding nothing you were talking about, to possibly understanding maybe some of what your talking about. 10/10
6:47 - Shouldn't the Time to yield be on the time axis?
At 6:45 time to yield should be an horizontal segment and not vertical, I think.
Great videos btw
I really love those fabs.
T̼h̼a̼n̼k̼s̼~̼~̼f̼o̼r̼ ̼w̼a̼t̼c̼h̼i̼n̼g̼!̼!̼!̼
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Isn't the length and width of the transistor still at near 20 nm even when their marketing is 5, 3 and 2 nm?
Is there any tolerance at all for defects? Like, if a single wrong "bridge" is formed, does that screw the whole chip?
That's the job of the chip designers to counteract the inevitable defects by making redundant circuitry units/routes or by designing circuits beyond the defined specs.
Making lower SKUs with partially defective dies or at the opposite making higher parts using the most nondefective dies won't be a thing without those tricks.
Daifuku also makes automated handling systems for human ashes. So when you go to the mausoleum to pay respects you punch in the info and the proper urn is delivered.
Super interesting
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Topic suggestion: fabless vs IDMs organization structure
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Interesting, but I still struggle to understand how the vertical yellow line in the plot @ 6:55 is a projection of “Time” while time is on the x horizontal axis and yield is in the y vertical axis…
@asianometry
Any insight as to how can Intel expect their nodes to stay competitive with TSMC that seems to be working with a lot more companies on a larger scale?
They have announced that they will open up their fabs for external customers. Currently also every capacity that is being offered will also be sold.
Even though Intel is a huge company making chips for a lot of applications (not only CPUs), this is certainly one of the reason why they want to open their foundries to fabless manufacturers.
industrial espionage (sponsored by shady agencies)
They probably can't.
Was the red network a picture of the Japanese pavilion at the Venice Biennale some years ago?🙃
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It took me this long to realize that TSMC's logo has a wafer in the background!
Actually, you can see TSMC's yield right there staring at you from their logo.
4:55 ha-ha "sto
1:40. Shouldn’t leading edge be N5, N6, N7 instead of 14, 16, 10?
Very good. China seems to have been able to use learning through scale in building infrastructure domestically and abroad. Perhaps worth a video as most governments struggle with time and cost to build individual infrastructure projects. Maybe the USA did the same when it built the interstate freeway system in the 1950s?
Is just a variation on "Experience is the Best Teacher." You need to actually try and fail to get the data needed to succeed.
TSMC is from Taiwan not China and is a local company not Chinese one.
It is mind boggling to think that it is possible to do a three nanometer process, if three nanometers is the size of the smallest feature that is only 14 atoms across assuming they are packed at the highest possible density allowed by the van der Waals radius for silicon which is probably optimistic. It is probably a lot less than this. How is it possible to have usable features that are only a few atoms in size, how is the defect rate not sky high ?
The Motorola yield problem sounds like an interesting story, but I couldn't find it on youtube. Does anybody have a link?
Apparently there are some underlying industries (besides ASML), and in the U.S., that are necessary to microprocessor fabrication - would love to have you explain these and how they fit in.
He already did videos on quite a few of them for example Carl Zeiss
@@Peter_Lynch Thanks!
You know I work in semiconductor qubits and when we have a 50% yeild on chips with 2-3 qubits on it we feel like they are high yield
Thanks for the informative video. FYI "stochastic" is "stow-kass-tik", rather than "stow-chass-tik" :)
The yield is proportional to the chemical and manufacturing steps needed to make the chips. In chemical reactions, yields are proportional to the number of steps and the yield at each step. So, if your yield is 90% per step and you have five steps, the best yield is .9 to the fifth power = .59 which is 59%. That chip manufacturers have done even better on yields than chemists is amazing.
Are atomic transistors coming still?
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Hello Asianometry I have a question. Why Japan didn't have the asml euv lithography machine? While Taiwan(tsmc) have it and southkorea*samsung) have it. It's so just confusing its impossible that no Japanese business would buy the asml euv lithography machine
I feel like it's not just randomness, but rather a lack of holistic understanding of a bigger picture. What always bothered me was that even when particles behave in a wave like manner (interference and such) I never thought of it as weird or unpredictable, but rather as an inability to measure all the interactions in the system (including every atom in slit as in a double slit experiments, or just some resonant fluctuations if such thing is even possible in probabilistic models).
OK, I have no idea, but it's very interesting. Maybe few episodes of "Quantum Leap" will bring some light on the subject.
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Those red dots on the wafer are used for Celeron cpus
at 6:50 the time to yield should be on the x not y axis, great video though!
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Didn't expect CZcams to recommend me something like this, but I don't mind.
It's so strange to think that the people doing some of the most difficult work there is are also trying to do it as fast as they possibly can...
And then all that effort is wasted to process a bloated web page written in a Swiss cheese language that's the hacker's delight and the data collector's daily bread.
that's also true for binary software using more inefficiently the hardware.
When we see G3/5/7/9 we see "binning". Each chip is tested and the best ones are premium G9's. The others do not go to waste, for they can be "adjusted" to suit the lower quality, acceptable levels. Just like flat panel displays, each panel reaches an acceptable level, and the rest are sold off to lower tier flat panel manufacturers.
I am interested in who will mass produce the first 2nm chip, as there is a lot of geopolitics into who will get it first. IBM's 2nm nanosheet technology claimed a density of 333.33MTr/mm2 (million transistors per square millimeter), but IBM does no fab at scale, IBM will likely license the tech to some company, and that makes geopolitics play into the game. Will IBM license the tech to just Intel (because of government dictate) or also allowed to license to Samsung & TSMC? Will TSMC's own 2nm succeed, or will license IBM's 2nm process?
Probably better for IBM to license it (if actually good) since they might have hiccups/delays building out the fabs.
well I'm sure ASML is currently working as hard as they can to produce there machines , so I'm not sure why would anyone buy ibms license tech when its already there !!
@@fwixgamer4796 ASML makes EUV lithography systems. ASML makes the machines that makes the chips. IBM has the fab process/recipe to make 2nm chips.
ASML is like Lodge that makes Cast iron pans.
IBM is like Wolfgang Puck, only he knows how to make his version of smoked salmon pizza
Let's go TSMC!!! Asian excellence!
Watching this video as I'm on my way to work at F18.
T̼h̼a̼n̼k̼s̼~̼~̼f̼o̼r̼ ̼w̼a̼t̼c̼h̼i̼n̼g̼!̼!̼!̼
̼T̼e̼x̼t̼ ̼o̼n̼ ̼W̼h̼a̼t̼s̼A̼p̼p̼✞̼︎̼✙̼①④④③⑤③⓪⑦⑨⑦⑨🚀🚀🚀📉▶️
Can we stick to SI units instead of pounds, ounces, feet, sticks, stones and bones. Thanks 😄
Scam bots. Scam bots everywhere
The first time I heard “FOUP” I thought it sounded like “foop”, which felt funny sounding until I internet searched and found out it is acronym of specific chip making processes.
This company is kicking butt - and Samsung
T̼h̼a̼n̼k̼s̼~̼~̼f̼o̼r̼ ̼w̼a̼t̼c̼h̼i̼n̼g̼!̼!̼!̼
̼T̼e̼x̼t̼ ̼o̼n̼ ̼W̼h̼a̼t̼s̼A̼p̼p̼✞̼︎̼✙̼①④④③⑤③⓪⑦⑨⑦⑨🚀🚀🚀📉 ▶️
0:25 question answered, welp on to the next
T̼h̼a̼n̼k̼s̼~̼~̼f̼o̼r̼ ̼w̼a̼t̼c̼h̼i̼n̼g̼!̼!̼!̼
̼T̼e̼x̼t̼ ̼o̼n̼ ̼W̼h̼a̼t̼s̼A̼p̼p̼✞̼︎̼✙̼①④④③⑤③⓪⑦⑨⑦⑨🚀🚀🚀📉▶️..
No Idea what I am doing here but i'm entertained
6:40 Time to yield should be a horizontal line, not a vertical line.
T̼h̼a̼n̼k̼s̼~̼~̼f̼o̼r̼ ̼w̼a̼t̼c̼h̼i̼n̼g̼!̼!̼!̼
̼T̼e̼x̼t̼ ̼o̼n̼ ̼W̼h̼a̼t̼s̼A̼p̼p̼✞̼︎̼✙̼①④④③⑤③⓪⑦⑨⑦⑨🚀🚀🚀📉▶️.
I'm wondering if China were to take over Taiwan, what would be more important? Securing the fabs or securing the fleeing senior personnel? Maybe the AI engineers are more important than the semiconductor ones? It's a fun thought experiment. It doesn't have to be a China takeover. It could be a tsunami or alien abduction or maybe a post-apocalyptic situation where they save the most important people in an underground vault to rebuild society while everyone else disintegrates. How much of the talent is local? Does TSMC even recruit from the outside? I know there's a bit of hubbub about Hong Kong refugees possibly being Chinese spies and not allowed permanent residence in Taiwan. I wonder how compartmentalized the process is for security reasons, or whether that's even possible in such bleeding edge developments.
I don't think that Taiwan war is likely in next 5-10 years, but in case it happens US will have many months to evacuate TSMC while China is preparing their forces
Hey John, while I was in Berkeley recently, I had dinner at a restaurant called Long Life Veggie Food on University Ave in N. Berkeley. OMG, that had to be THE most delicious Asian veggie dinner I’ve ever had (and I’ve been a vegetarian for 52 years). Being a Cal Berkeley guy, you must have eaten there too.
T̼h̼a̼n̼k̼s̼~̼~̼f̼o̼r̼ ̼w̼a̼t̼c̼h̼i̼n̼g̼!̼!̼!̼
̼T̼e̼x̼t̼ ̼o̼n̼ ̼W̼h̼a̼t̼s̼A̼p̼p̼✞̼︎̼✙̼①④④③⑤③⓪⑦⑨⑦⑨🚀🚀🚀📉▶️
verry good
T̼h̼a̼n̼k̼s̼~̼~̼f̼o̼r̼ ̼w̼a̼t̼c̼h̼i̼n̼g̼!̼!̼!̼
̼T̼e̼x̼t̼ ̼o̼n̼ ̼W̼h̼a̼t̼s̼A̼p̼p̼✞̼︎̼✙̼①④④③⑤③⓪⑦⑨⑦⑨🚀🚀🚀📉▶️..
What was the source of the problem at motorola that took 5 years to solve?
T̼h̼a̼n̼k̼s̼~̼~̼f̼o̼r̼ ̼w̼a̼t̼c̼h̼i̼n̼g̼!̼!̼!̼
̼T̼e̼x̼t̼ ̼o̼n̼ ̼W̼h̼a̼t̼s̼A̼p̼p̼✞̼︎̼✙̼①④④③⑤③⓪⑦⑨⑦⑨🚀🚀🚀📉▶️.
@@ADMIN-ln4dy thats not helping tho 😀
Just wondering, if they have a bad wafer, can a fan not take that bad wafer and idk, re-fab that wafer somehow? Guess I'm trying to say recycle the silicon out of that bad wafer.
That wafer now has a ton of "contamination" on it from the previous process steps, so that would not be possible. It would be like taking a half made pizza and trying to start over from scratch.
There exist wafer and mask repair tools, e.g. czcams.com/video/le6JM5RpMwk/video.html
T̼h̼a̼n̼k̼s̼~̼~̼f̼o̼r̼ ̼w̼a̼t̼c̼h̼i̼n̼g̼!̼!̼!̼
̼T̼e̼x̼t̼ ̼o̼n̼ ̼W̼h̼a̼t̼s̼A̼p̼p̼✞̼︎̼✙̼①④④③⑤③⓪⑦⑨⑦⑨🚀🚀🚀📉▶️
Is TSMC's logo basically a wafer with bad yield? :P
back to the beginning
T̼h̼a̼n̼k̼s̼~̼~̼f̼o̼r̼ ̼w̼a̼t̼c̼h̼i̼n̼g̼!̼!̼!̼
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I'm pumped up for TSMC plants coming to North America. Its gonna take a while but it will be sweet to have them here in the west one day. Great work Taiwan !
With the political situation in US growing more unstable and fascist for every election, it is surprising that TSMC dares to invest in North America at all!
@@terribleatgames-rippedoff With all the tension that happening in China and Taiwan border, it's not surprising tbh.
I just hope it's going smoothly, especially with the recent threat that Taiwan faces.
@@RessG Yeah, but come on. If your company's fabs need strategic relocalisationing, one would think a new location with a stable political situation would be preferred? The US has shown us that they are going down very fast, losing grip on their political stability.
@百里嘻 give the west time we are not the fastest to learn but we will adapt to what will be needed. Transportation has a ton of talent here on North America that most of technology world doesn't even touch slightly. Winter mountains heat we have everything and our transportation is world class for training and spending. Semis will be next here.
@@terribleatgames-rippedoff 🤣🤣🤣
1:40 Orochimaru approves of this style.
8:39 The tendrils look like mycelium going through a soft, loamy foodstuff like bread.